# SN74ABT541BDWR

**Texas Instruments** · Buffer/Driver/Transceiver · SOIC-20-300mil

SN74ABT541BDWR from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE1 | input | Output-enable input 1, active low; if either OE1 or OE2 is high all eight outputs are in the high-impedance state. |
| 2 | A1 | input | Data input 1 of the octal buffer, drives output Y1. |
| 3 | A2 | input | Data input 2 of the octal buffer, drives output Y2. |
| 4 | A3 | input | Data input 3 of the octal buffer, drives output Y3. |
| 5 | A4 | input | Data input 4 of the octal buffer, drives output Y4. |
| 6 | A5 | input | Data input 5 of the octal buffer, drives output Y5. |
| 7 | A6 | input | Data input 6 of the octal buffer, drives output Y6. |
| 8 | A7 | input | Data input 7 of the octal buffer, drives output Y7. |
| 9 | A8 | input | Data input 8 of the octal buffer, drives output Y8. |
| 10 | GND | power_in | Ground pin. |
| 11 | Y8 | tri_state | 3-state high-drive output 8 (-32 mA IOH, 64 mA IOL), follows A8 when enabled. |
| 12 | Y7 | tri_state | 3-state high-drive output 7 (-32 mA IOH, 64 mA IOL), follows A7 when enabled. |
| 13 | Y6 | tri_state | 3-state high-drive output 6 (-32 mA IOH, 64 mA IOL), follows A6 when enabled. |
| 14 | Y5 | tri_state | 3-state high-drive output 5 (-32 mA IOH, 64 mA IOL), follows A5 when enabled. |
| 15 | Y4 | tri_state | 3-state high-drive output 4 (-32 mA IOH, 64 mA IOL), follows A4 when enabled. |
| 16 | Y3 | tri_state | 3-state high-drive output 3 (-32 mA IOH, 64 mA IOL), follows A3 when enabled. |
| 17 | Y2 | tri_state | 3-state high-drive output 2 (-32 mA IOH, 64 mA IOL), follows A2 when enabled. |
| 18 | Y1 | tri_state | 3-state high-drive output 1 (-32 mA IOH, 64 mA IOL), follows A1 when enabled. |
| 19 | OE2 | input | Output-enable input 2, active low; if either OE1 or OE2 is high all eight outputs are in the high-impedance state. |
| 20 | VCC | power_in | Supply voltage, 4.5 V to 5.5 V recommended operating range. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-20-300mil |
| Category | Logic ICs |
| Pins | 20 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 4.5 |  | 5.5 | V |  | 3 |
| High-level input voltage | VIH | 2 |  |  | V |  | 3 |
| Low-level input voltage | VIL |  |  | 0.8 | V |  | 3 |
| High-level output current | IOH | -32 |  |  | mA |  | 3 |
| Low-level output current | IOL |  |  | 64 | mA |  | 3 |
| Input transition rise or fall rate | Δt/Δv |  |  | 5 | ns/V |  | 3 |
| Power-up ramp rate | Δt/ΔVCC | 200 |  |  | µs/V |  | 3 |
| Operating free-air temperature | TA | -40 |  | 85 | °C |  | 3 |
| Supply voltage range | VCC | -0.5 |  | 7 | V |  | 3 |
| Input voltage range | VI | -0.5 |  | 7 | V |  | 3 |
| Voltage range applied to any output in the high or power-off state | VO | -0.5 |  | 5.5 | V |  | 3 |
| Current into any output in the low state | IO |  |  | 128 | mA | SN74ABT541B | 3 |
| Input clamp current | IIK |  |  | -18 | mA | VI < 0 | 3 |
| Output clamp current | IOK |  |  | -50 | mA | VO < 0 | 3 |
| Storage temperature range | Tstg | -65 |  | 150 | °C |  | 3 |
| Package thermal impedance | θJA |  |  | 97 | °C/W | DW package | 3 |
| Input clamp voltage | VIK |  |  | -1.2 | V | VCC = 4.5 V, II = -18 mA | 4 |
| High-level output voltage | VOH | 2.5 |  |  | V | VCC = 4.5 V, IOH = -3 mA | 4 |
| High-level output voltage | VOH | 3 |  |  | V | VCC = 5 V, IOH = -3 mA | 4 |
| High-level output voltage | VOH | 2 |  |  | V | VCC = 4.5 V, IOH = -32 mA | 4 |
| Low-level output voltage | VOL |  |  | 0.55 | V | VCC = 4.5 V, IOL = 64 mA | 4 |
| Input current | II | -1 |  | 1 | µA | VCC = 5.5 V, VI = VCC or GND | 4 |
| Power-up off-state output current | IOZPU | -50 |  | 50 | µA | VCC = 0 to 2.1 V, VO = 0.5 V to 2.7 V, OE = X | 4 |
| Power-down off-state output current | IOZPD | -50 |  | 50 | µA | VCC = 2.1 V to 0, VO = 0.5 V to 2.7 V, OE = X | 4 |
| Off-state output current, high | IOZH |  |  | 10 | µA | VCC = 5.5 V, VO = 2.7 V | 4 |
| Off-state output current, low | IOZL | -10 |  |  | µA | VCC = 5.5 V, VO = 0.5 V | 4 |
| Power-off leakage current | Ioff | -100 |  | 100 | µA | VCC = 0 V, VI or VO ≤ 4.5 V | 4 |
| Output high leakage current | ICEX |  |  | 50 | µA | VCC = 5.5 V, VO = 5.5 V, Outputs high | 4 |
| Output current | IO | -180 |  | -50 | mA | VCC = 5.5 V, VO = 2.5 V | 4 |
| Supply current, outputs high | ICC |  | 5 | 250 | µA | VCC = 5.5 V, IO = 0, VI = VCC or GND, Outputs high | 4 |
| Supply current, outputs low | ICC |  | 22 | 30 | mA | VCC = 5.5 V, IO = 0, VI = VCC or GND, Outputs low | 4 |
| Supply current, outputs disabled | ICC |  | 1 | 250 | µA | VCC = 5.5 V, IO = 0, VI = VCC or GND, Outputs disabled | 4 |
| Supply current change, outputs enabled | ΔICC |  |  | 1.5 | mA | VCC = 5.5 V, One input at 3.4 V, other inputs at VCC or GND, Outputs enabled | 4 |
| Supply current change, outputs disabled | ΔICC |  |  | 50 | µA | VCC = 5.5 V, One input at 3.4 V, other inputs at VCC or GND, Outputs disabled | 4 |
| Supply current change, control inputs | ΔICC |  |  | 1.5 | mA | VCC = 5.5 V, One input at 3.4 V, other inputs at VCC or GND, Control Inputs | 4 |
| Propagation delay A to Y (low-to-high) | tPLH | 1 | 2 | 3.9 | ns | VCC = 5 V, CL = 50 pF; typ at TA = 25°C; min/max over range | 5 |
| Propagation delay A to Y (high-to-low) | tPHL | 1 | 2.6 | 3.9 | ns | VCC = 5 V, CL = 50 pF; typ at TA = 25°C; min/max over range | 5 |
| Output enable time to high, OE to Y | tPZH | 2 | 3.5 | 4 | ns | VCC = 5 V, CL = 50 pF | 5 |
| Output enable time to low, OE to Y | tPZL | 1.9 | 4 | 5.9 | ns | VCC = 5 V, CL = 50 pF | 5 |
| Output disable time from high, OE to Y | tPHZ | 2.2 | 4.4 | 5.8 | ns | VCC = 5 V, CL = 50 pF | 5 |
| Output disable time from low, OE to Y | tPLZ | 1.5 | 3 | 4.4 | ns | VCC = 5 V, CL = 50 pF | 5 |
| Output skew | tsk(o) |  |  | 0.5 | ns | Skew between any two outputs of the same package switching in the same direction | 5 |
| Input capacitance | Ci |  | 3 |  | pF | VI = 2.5 V or 0.5 V | 4 |
| Output capacitance | Co |  | 6 |  | pF | VO = 2.5 V or 0.5 V | 4 |
| Input hysteresis | Vhys |  | 100 |  | mV |  | 4 |

## CAD (KiCad official)

- Symbol: `SN74ABT541BDWR`
- Footprint: `Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm`
- 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files: `sn74abt541bdwr-etched.step` / `sn74abt541bdwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74abt541bdwr.step` / `sn74abt541bdwr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn74abt541bdwr.pdf) (27 pp, sha256 `45d048ab6776441f`, retrieved 2026-10-23, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/sn74abt541bdwr-datasheet.pdf)