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SN74ABT377ADWR

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Texas Instruments Flip Flops, SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Symbol & Footprint

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Datasheet

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Contents

README

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SN74ABT377ADWR

Texas Instruments · Flip Flops · SOIC-20-300mil

SN74ABT377ADWR from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CLKEN input Active-low clock enable input that inhibits data transfer to outputs when high.
2 1Q output Flip-flop 1 buffered Q output, transfers D data on positive-edge CLK when CLKEN is low.
3 1D input Flip-flop 1 D data input, captured on positive-edge CLK when CLKEN is low.
4 2D input Flip-flop 2 D data input, captured on positive-edge CLK when CLKEN is low.
5 2Q output Flip-flop 2 buffered Q output, transfers D data on positive-edge CLK when CLKEN is low.
6 3Q output Flip-flop 3 buffered Q output, transfers D data on positive-edge CLK when CLKEN is low.
7 3D input Flip-flop 3 D data input, captured on positive-edge CLK when CLKEN is low.
8 4D input Flip-flop 4 D data input, captured on positive-edge CLK when CLKEN is low.
9 4Q output Flip-flop 4 buffered Q output, transfers D data on positive-edge CLK when CLKEN is low.
10 GND power_in Ground power supply connection.
11 CLK input Positive-edge-triggered clock input for data transfer when CLKEN is low.
12 5Q output Flip-flop 5 buffered Q output, transfers D data on positive-edge CLK when CLKEN is low.
13 5D input Flip-flop 5 D data input, captured on positive-edge CLK when CLKEN is low.
14 6D input Flip-flop 6 D data input, captured on positive-edge CLK when CLKEN is low.
15 6Q output Flip-flop 6 buffered Q output, transfers D data on positive-edge CLK when CLKEN is low.
16 7Q output Flip-flop 7 buffered Q output, transfers D data on positive-edge CLK when CLKEN is low.
17 7D input Flip-flop 7 D data input, captured on positive-edge CLK when CLKEN is low.
18 8D input Flip-flop 8 D data input, captured on positive-edge CLK when CLKEN is low.
19 8Q output Flip-flop 8 buffered Q output, transfers D data on positive-edge CLK when CLKEN is low.
20 VCC power_in Supply voltage power connection, recommended operating range 4.5-5.5V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-20-300mil
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: SN74ABT377ADWR
  • Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
  • 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
  • 3D model files: sn74abt377adwr-etched.step / sn74abt377adwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74abt377adwr.step / sn74abt377adwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (25 pp, sha256 37f5822de8187c3f, retrieved 2026-10-03, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF