component

SN74ABT245BN

Public Made by Adom

by adom

Texas Instruments Latches, PDIP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogic icssn74abt245bnfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Datasheet

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

SN74ABT245BN

Texas Instruments · Latches · PDIP-20

SN74ABT245BN from Texas Instruments, in a PDIP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DIR input Direction-control input: high transmits A data to the B bus, low transmits B data to the A bus.
2 A1 bidirectional A-bus I/O channel 1 with 3-state output, high drive of -32 mA IOH and 64 mA IOL.
3 A2 bidirectional A-bus I/O channel 2 with 3-state output, high drive of -32 mA IOH and 64 mA IOL.
4 A3 bidirectional A-bus I/O channel 3 with 3-state output, high drive of -32 mA IOH and 64 mA IOL.
5 A4 bidirectional A-bus I/O channel 4 with 3-state output, high drive of -32 mA IOH and 64 mA IOL.
6 A5 bidirectional A-bus I/O channel 5 with 3-state output, high drive of -32 mA IOH and 64 mA IOL.
7 A6 bidirectional A-bus I/O channel 6 with 3-state output, high drive of -32 mA IOH and 64 mA IOL.
8 A7 bidirectional A-bus I/O channel 7 with 3-state output, high drive of -32 mA IOH and 64 mA IOL.
9 A8 bidirectional A-bus I/O channel 8 with 3-state output, high drive of -32 mA IOH and 64 mA IOL.
10 GND power_in Ground.
11 B8 bidirectional B-bus I/O channel 8 with 3-state output, high drive of -32 mA IOH and 64 mA IOL.
12 B7 bidirectional B-bus I/O channel 7 with 3-state output, high drive of -32 mA IOH and 64 mA IOL.
13 B6 bidirectional B-bus I/O channel 6 with 3-state output, high drive of -32 mA IOH and 64 mA IOL.
14 B5 bidirectional B-bus I/O channel 5 with 3-state output, high drive of -32 mA IOH and 64 mA IOL.
15 B4 bidirectional B-bus I/O channel 4 with 3-state output, high drive of -32 mA IOH and 64 mA IOL.
16 B3 bidirectional B-bus I/O channel 3 with 3-state output, high drive of -32 mA IOH and 64 mA IOL.
17 B2 bidirectional B-bus I/O channel 2 with 3-state output, high drive of -32 mA IOH and 64 mA IOL.
18 B1 bidirectional B-bus I/O channel 1 with 3-state output, high drive of -32 mA IOH and 64 mA IOL.
19 OE input Output-enable input: high disables the outputs and isolates the buses; tie to VCC through a pullup resistor to ensure high-impedance during power up or power down.
20 VCC power_in Supply voltage, 4.5 V to 5.5 V recommended.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package PDIP-20
Category Logic ICs
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 4.5 5.5 V 3
High-level input voltage VIH 2 V 3
Low-level input voltage VIL 0.8 V 3
Input voltage VI 0 5.5 V 0 to VCC 3
High-level output current IOH -32 mA 3
Low-level output current IOL 64 mA 3
Input transition rise or fall rate Δt/Δv 5 ns/V 3
Power-up ramp rate Δt/ΔVCC 200 μs/V 3
Operating free-air temperature TA -40 85 °C 3
Supply voltage range VCC -0.5 7 V 3
Input voltage range (except I/O ports) VI -0.5 7 V Note 1 3
Voltage applied to any output in high or power-off state VO -0.5 5.5 V 3
Current into any output in the low state IO 128 mA SN74ABT245B 3
Input clamp current IIK -18 mA VI < 0 3
Output clamp current IOK -50 mA VO < 0 3
Package thermal impedance, N package θJA 69 °C/W Note 2 3
Storage temperature range Tstg -65 150 °C 3
Input clamp voltage VIK -1.2 V VCC = 4.5 V, II = −18 mA 4
High-level output voltage VOH 2.5 V VCC = 4.5 V, IOH = −3 mA 4
High-level output voltage VOH 3 V VCC = 5 V, IOH = −3 mA 4
High-level output voltage VOH 2 V VCC = 4.5 V, IOH = −24 mA 4
Low-level output voltage VOL 0.55 V VCC = 4.5 V, IOL = 48 mA 4
Input hysteresis Vhys 100 mV 4
Input current, control inputs II -1 1 μA VCC = 0 to 5.5 V, VI = VCC or GND 4
Input current, A or B ports II -20 20 μA VCC = 2.1 V to 5.5 V, VI = VCC or GND 4
Power-up 3-state output current IOZPU -50 50 μA VCC = 0 to 2.1 V, VO = 0.5 V to 2.7 V, OE = X 4
Power-down 3-state output current IOZPD -50 50 μA VCC = 2.1 V to 0, VO = 0.5 V to 2.7 V, OE = X 4
Off-state output current high IOZH 10 μA VCC = 2.1 V to 5.5 V, VO = 2.7 V, OE ≥ 2 V 4
Off-state output current low IOZL -10 μA VCC = 2.1 V to 5.5 V, VO = 0.5 V, OE ≥ 2 V 4
Power-off leakage current Ioff -100 100 μA VCC = 0, VI or VO ≤ 5.5 V 4
Output high leakage current ICEX 50 μA VCC = 5.5 V, VO = 5.5 V, outputs high 4
Output short-circuit current IO -50 -180 mA VCC = 5.5 V, VO = 2.5 V 4
Supply current, outputs high ICC 250 μA VCC = 5.5 V, IO = 0, VI = VCC or GND, outputs high 4
Supply current, outputs low ICC 30 mA VCC = 5.5 V, IO = 0, VI = VCC or GND, outputs low 4
Supply current, outputs disabled ICC 250 μA VCC = 5.5 V, IO = 0, VI = VCC or GND, outputs disabled 4
Supply current change, data inputs, outputs enabled ΔICC 1.5 mA VCC = 5.5 V, one input at 3.4 V, other inputs at VCC or GND, outputs enabled 4
Supply current change, data inputs, outputs disabled ΔICC 50 μA VCC = 5.5 V, one input at 3.4 V, other inputs at VCC or GND, outputs disabled 4
Supply current change, control inputs ΔICC 1.5 mA VCC = 5.5 V, one input at 3.4 V, other inputs at VCC or GND 4
Input capacitance, control inputs Ci 4 pF VI = 2.5 V or 0.5 V 4
Input/output capacitance, A or B ports Cio 8 pF VO = 2.5 V or 0.5 V 4
Propagation delay, low-to-high, A or B to B or A tPLH 1 3.6 ns CL = 50 pF 5
Propagation delay, high-to-low, A or B to B or A tPHL 1 3.9 ns CL = 50 pF 5
Output enable time to high level, OE to A or B tPZH 2 5.6 ns CL = 50 pF 5
Output enable time to low level, OE to A or B tPZL 1.9 6.2 ns CL = 50 pF 5
Output disable time from high level, OE to A or B tPHZ 2.2 5.9 ns CL = 50 pF 5
Output disable time from low level, OE to A or B tPLZ 1.5 4.5 ns CL = 50 pF 5
Skew, output to output tsk(o) 0.5 ns CL = 50 pF 5

CAD (KiCad official)

  • Symbol: SN74ABT245BN
  • Footprint: Package_DIP:DIP-20_W7.62mm
  • 3D model: PDIP-20 (KiCad packages3D, STEP)
  • 3D model files: sn74abt245bn-etched.step / sn74abt245bn-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74abt245bn.step / sn74abt245bn.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (32 pp, sha256 1dc8a3424d8a829f, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF