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SN74ABT240APWR
Public Made by Adomby adom
Texas Instruments Buffers, Drivers, Receivers, Transceivers, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SN74ABT240APWR
Texas Instruments · Buffers, Drivers, Receivers, Transceivers · TSSOP-20
SN74ABT240APWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Active-low output enable for buffer section 1; when low, outputs 1Y1 to 1Y4 pass inverted data from 1A1 to 1A4, and when high, they are in the high-impedance state. |
| 2 | 1A1 | input | Data input to buffer section 1, inverted to output 1Y1 when 1OE is low; unused inputs must be held at VCC or GND. |
| 3 | 2Y4 | tri_state | 3-state output of buffer section 2, the inverted version of 2A4 when 2OE is low and high-impedance when 2OE is high; high-drive, rated -32 mA IOH and 64 mA IOL for SN74ABT240A. |
| 4 | 1A2 | input | Data input to buffer section 1, inverted to output 1Y2 when 1OE is low; unused inputs must be held at VCC or GND. |
| 5 | 2Y3 | tri_state | 3-state output of buffer section 2, the inverted version of 2A3 when 2OE is low and high-impedance when 2OE is high; high-drive, rated -32 mA IOH and 64 mA IOL for SN74ABT240A. |
| 6 | 1A3 | input | Data input to buffer section 1, inverted to output 1Y3 when 1OE is low; unused inputs must be held at VCC or GND. |
| 7 | 2Y2 | tri_state | 3-state output of buffer section 2, the inverted version of 2A2 when 2OE is low and high-impedance when 2OE is high; high-drive, rated -32 mA IOH and 64 mA IOL for SN74ABT240A. |
| 8 | 1A4 | input | Data input to buffer section 1, inverted to output 1Y4 when 1OE is low; unused inputs must be held at VCC or GND. |
| 9 | 2Y1 | tri_state | 3-state output of buffer section 2, the inverted version of 2A1 when 2OE is low and high-impedance when 2OE is high; high-drive, rated -32 mA IOH and 64 mA IOL for SN74ABT240A. |
| 10 | GND | power_in | Ground reference for the device. |
| 11 | 2A1 | input | Data input to buffer section 2, inverted to output 2Y1 when 2OE is low; unused inputs must be held at VCC or GND. |
| 12 | 1Y4 | tri_state | 3-state output of buffer section 1, the inverted version of 1A4 when 1OE is low and high-impedance when 1OE is high; high-drive, rated -32 mA IOH and 64 mA IOL for SN74ABT240A. |
| 13 | 2A2 | input | Data input to buffer section 2, inverted to output 2Y2 when 2OE is low; unused inputs must be held at VCC or GND. |
| 14 | 1Y3 | tri_state | 3-state output of buffer section 1, the inverted version of 1A3 when 1OE is low and high-impedance when 1OE is high; high-drive, rated -32 mA IOH and 64 mA IOL for SN74ABT240A. |
| 15 | 2A3 | input | Data input to buffer section 2, inverted to output 2Y3 when 2OE is low; unused inputs must be held at VCC or GND. |
| 16 | 1Y2 | tri_state | 3-state output of buffer section 1, the inverted version of 1A2 when 1OE is low and high-impedance when 1OE is high; high-drive, rated -32 mA IOH and 64 mA IOL for SN74ABT240A. |
| 17 | 2A4 | input | Data input to buffer section 2, inverted to output 2Y4 when 2OE is low; unused inputs must be held at VCC or GND. |
| 18 | 1Y1 | tri_state | 3-state output of buffer section 1, the inverted version of 1A1 when 1OE is low and high-impedance when 1OE is high; high-drive, rated -32 mA IOH and 64 mA IOL for SN74ABT240A. |
| 19 | 2OE | input | Active-low output enable for buffer section 2; when low, outputs 2Y1 to 2Y4 pass inverted data from 2A1 to 2A4, and when high, they are in the high-impedance state. |
| 20 | VCC | power_in | Supply voltage, 4.5 V minimum to 5.5 V maximum per recommended operating conditions. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-20 |
| Category | Logic |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
SN74ABT240APWR - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
sn74abt240apwr-etched.step/sn74abt240apwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74abt240apwr.step/sn74abt240apwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (26 pp, sha256
809f246e9ce5e1ce, retrieved 2026-10-07, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SN74ABT240APWR
**Texas Instruments** · Buffers, Drivers, Receivers, Transceivers · TSSOP-20
SN74ABT240APWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Active-low output enable for buffer section 1; when low, outputs 1Y1 to 1Y4 pass inverted data from 1A1 to 1A4, and when high, they are in the high-impedance state. |
| 2 | 1A1 | input | Data input to buffer section 1, inverted to output 1Y1 when 1OE is low; unused inputs must be held at VCC or GND. |
| 3 | 2Y4 | tri_state | 3-state output of buffer section 2, the inverted version of 2A4 when 2OE is low and high-impedance when 2OE is high; high-drive, rated -32 mA IOH and 64 mA IOL for SN74ABT240A. |
| 4 | 1A2 | input | Data input to buffer section 1, inverted to output 1Y2 when 1OE is low; unused inputs must be held at VCC or GND. |
| 5 | 2Y3 | tri_state | 3-state output of buffer section 2, the inverted version of 2A3 when 2OE is low and high-impedance when 2OE is high; high-drive, rated -32 mA IOH and 64 mA IOL for SN74ABT240A. |
| 6 | 1A3 | input | Data input to buffer section 1, inverted to output 1Y3 when 1OE is low; unused inputs must be held at VCC or GND. |
| 7 | 2Y2 | tri_state | 3-state output of buffer section 2, the inverted version of 2A2 when 2OE is low and high-impedance when 2OE is high; high-drive, rated -32 mA IOH and 64 mA IOL for SN74ABT240A. |
| 8 | 1A4 | input | Data input to buffer section 1, inverted to output 1Y4 when 1OE is low; unused inputs must be held at VCC or GND. |
| 9 | 2Y1 | tri_state | 3-state output of buffer section 2, the inverted version of 2A1 when 2OE is low and high-impedance when 2OE is high; high-drive, rated -32 mA IOH and 64 mA IOL for SN74ABT240A. |
| 10 | GND | power_in | Ground reference for the device. |
| 11 | 2A1 | input | Data input to buffer section 2, inverted to output 2Y1 when 2OE is low; unused inputs must be held at VCC or GND. |
| 12 | 1Y4 | tri_state | 3-state output of buffer section 1, the inverted version of 1A4 when 1OE is low and high-impedance when 1OE is high; high-drive, rated -32 mA IOH and 64 mA IOL for SN74ABT240A. |
| 13 | 2A2 | input | Data input to buffer section 2, inverted to output 2Y2 when 2OE is low; unused inputs must be held at VCC or GND. |
| 14 | 1Y3 | tri_state | 3-state output of buffer section 1, the inverted version of 1A3 when 1OE is low and high-impedance when 1OE is high; high-drive, rated -32 mA IOH and 64 mA IOL for SN74ABT240A. |
| 15 | 2A3 | input | Data input to buffer section 2, inverted to output 2Y3 when 2OE is low; unused inputs must be held at VCC or GND. |
| 16 | 1Y2 | tri_state | 3-state output of buffer section 1, the inverted version of 1A2 when 1OE is low and high-impedance when 1OE is high; high-drive, rated -32 mA IOH and 64 mA IOL for SN74ABT240A. |
| 17 | 2A4 | input | Data input to buffer section 2, inverted to output 2Y4 when 2OE is low; unused inputs must be held at VCC or GND. |
| 18 | 1Y1 | tri_state | 3-state output of buffer section 1, the inverted version of 1A1 when 1OE is low and high-impedance when 1OE is high; high-drive, rated -32 mA IOH and 64 mA IOL for SN74ABT240A. |
| 19 | 2OE | input | Active-low output enable for buffer section 2; when low, outputs 2Y1 to 2Y4 pass inverted data from 2A1 to 2A4, and when high, they are in the high-impedance state. |
| 20 | VCC | power_in | Supply voltage, 4.5 V minimum to 5.5 V maximum per recommended operating conditions. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-20 |
| Category | Logic |
| Pins | 20 |
## CAD (KiCad official)
- Symbol: `SN74ABT240APWR`
- Footprint: `Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm`
- 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files: `sn74abt240apwr-etched.step` / `sn74abt240apwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74abt240apwr.step` / `sn74abt240apwr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn74abt240a.pdf) (26 pp, sha256 `809f246e9ce5e1ce`, retrieved 2026-10-07, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sn74abt240apwr-datasheet.pdf)