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SN74ABT2240APWR

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Texas Instruments Buffers, Drivers, Receivers, Transceivers, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SN74ABT2240APWR

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · TSSOP-20

SN74ABT2240APWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OE input Active-low output enable for the first 4-bit driver; when high, outputs 1Y1 to 1Y4 are forced to the high-impedance state.
2 1A1 input Data input to driver channel 1; data passes inverted to output 1Y1 when 1OE is low.
3 2Y4 tri_state Inverting 3-state output of driver channel 2, designed to sink up to 12 mA and including a 25-Ω series resistor.
4 1A2 input Data input to driver channel 1; data passes inverted to output 1Y2 when 1OE is low.
5 2Y3 tri_state Inverting 3-state output of driver channel 2, designed to sink up to 12 mA and including a 25-Ω series resistor.
6 1A3 input Data input to driver channel 1; data passes inverted to output 1Y3 when 1OE is low.
7 2Y2 tri_state Inverting 3-state output of driver channel 2, designed to sink up to 12 mA and including a 25-Ω series resistor.
8 1A4 input Data input to driver channel 1; data passes inverted to output 1Y4 when 1OE is low.
9 2Y1 tri_state Inverting 3-state output of driver channel 2, designed to sink up to 12 mA and including a 25-Ω series resistor.
10 GND power_in Ground reference for the device.
11 2A1 input Data input to driver channel 2; data passes inverted to output 2Y1 when 2OE is low.
12 1Y4 tri_state Inverting 3-state output of driver channel 1, designed to sink up to 12 mA and including a 25-Ω series resistor.
13 2A2 input Data input to driver channel 2; data passes inverted to output 2Y2 when 2OE is low.
14 1Y3 tri_state Inverting 3-state output of driver channel 1, designed to sink up to 12 mA and including a 25-Ω series resistor.
15 2A3 input Data input to driver channel 2; data passes inverted to output 2Y3 when 2OE is low.
16 1Y2 tri_state Inverting 3-state output of driver channel 1, designed to sink up to 12 mA and including a 25-Ω series resistor.
17 2A4 input Data input to driver channel 2; data passes inverted to output 2Y4 when 2OE is low.
18 1Y1 tri_state Inverting 3-state output of driver channel 1, designed to sink up to 12 mA and including a 25-Ω series resistor.
19 2OE input Active-low output enable for the second 4-bit driver; when high, outputs 2Y1 to 2Y4 are forced to the high-impedance state.
20 VCC power_in Supply voltage, recommended operating range 4.5 V to 5.5 V; OE should be tied to VCC through a pullup resistor to hold outputs high-impedance during power up or down.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-20
Category Logic
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 4.5 5.5 V 4
High-level input voltage VIH 2 V 4
Low-level input voltage VIL 0.8 V 4
Input voltage VI 0 V Maximum printed as VCC 4
High-level output current IOH -32 mA SN74ABT2240A 4
Low-level output current IOL 12 mA 4
Input transition rise or fall rate Δt/Δv 5 ns/V Outputs enabled 4
Operating free-air temperature TA -40 85 °C SN74ABT2240A 4
Supply voltage VCC -0.5 7 V 3
Input voltage VI -0.5 7 V See Note 1 3
Voltage applied to any output in high or power-off state VO -0.5 5.5 V 3
Current into any output in low state IO 30 mA 3
Input clamp current IIK -18 mA VI < 0 3
Output clamp current IOK -50 mA VO < 0 3
Storage temperature range Tstg -65 150 °C 3
Package thermal impedance, PW package θJA 128 °C/W PW package, per JESD 51 3
Input clamp voltage VIK -1.2 V VCC = 4.5 V, II = -18 mA 4
High-level output voltage VOH 2.5 V VCC = 4.5 V, IOH = -3 mA 4
High-level output voltage VOH 3 V VCC = 5 V, IOH = -3 mA 4
High-level output voltage VOH 2 V VCC = 4.5 V, IOH = -24 mA 4
Low-level output voltage VOL 0.8 V VCC = 4.5 V, IOL = 12 mA 4
Input current II -1 1 µA VCC = 5.5 V, VI = VCC or GND 4
Off-state output current, high-level voltage applied IOZH 10 µA VCC = 5.5 V, VO = 2.7 V 4
Off-state output current, low-level voltage applied IOZL -10 µA VCC = 5.5 V, VO = 0.5 V 4
Power-off input/output current Ioff -100 100 µA VCC = 0, VI or VO ≤ 4.5 V 4
Output high leakage current ICEX 50 µA VCC = 5.5 V, VO = 5.5 V, outputs high 4
Short-circuit output current IO -50 -100 -180 mA VCC = 5.5 V, VO = 2.5 V 4
Supply current, outputs high ICC 1 250 µA VCC = 5.5 V, IO = 0, VI = VCC or GND 4
Supply current, outputs low ICC 24 30 mA VCC = 5.5 V, IO = 0, VI = VCC or GND 4
Supply current, outputs disabled ICC 0.5 250 µA VCC = 5.5 V, IO = 0, VI = VCC or GND 4
Increase in supply current per data input ΔICC 1.5 mA VCC = 5.5 V, one input at 3.4 V, other inputs at VCC or GND, outputs enabled 4
Increase in supply current per data input ΔICC 0.05 mA VCC = 5.5 V, one input at 3.4 V, other inputs at VCC or GND, outputs disabled 4
Increase in supply current per control input ΔICC 1.5 mA VCC = 5.5 V, one input at 3.4 V, other inputs at VCC or GND 4
Propagation delay, A to Y, low-to-high tPLH 1 3 4.8 ns CL = 50 pF; typ at VCC = 5 V, TA = 25°C 5
Propagation delay, A to Y, high-to-low tPHL 2.1 4.1 5.4 ns CL = 50 pF; typ at VCC = 5 V, TA = 25°C 5
Enable time, OE to Y, high level tPZH 1.1 3.1 5.2 ns CL = 50 pF; typ at VCC = 5 V, TA = 25°C 5
Enable time, OE to Y, low level tPZL 1.7 4.5 6.8 ns CL = 50 pF; typ at VCC = 5 V, TA = 25°C 5
Disable time, OE to Y, high level tPHZ 1.8 3.4 6.4 ns CL = 50 pF; typ at VCC = 5 V, TA = 25°C 5
Disable time, OE to Y, low level tPLZ 1.9 3.6 6.2 ns CL = 50 pF; typ at VCC = 5 V, TA = 25°C 5

CAD (KiCad official)

  • Symbol: SN74ABT2240APWR
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: sn74abt2240apwr-etched.step / sn74abt2240apwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74abt2240apwr.step / sn74abt2240apwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (25 pp, sha256 99b38c8657194fbb, retrieved 2026-10-18, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF