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SN74ABT125DR
Public Made by Adomby adom
Texas Instruments Buffers, Drivers, Receivers, Transceivers, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74ABT125DR
Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SOIC-14
SN74ABT125DR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Output-enable input for buffer 1; when high the 1Y output is forced to the high-impedance state, when low 1Y follows 1A (VIH ≥ 2 V, VIL ≤ 0.8 V per function table). |
| 2 | 1A | input | Data input for bus-buffer channel 1, buffered onto 1Y when 1OE is low (VIH ≥ 2 V, VIL ≤ 0.8 V). |
| 3 | 1Y | tri_state | 3-state buffer output for channel 1; drives high/low following 1A when enabled (IOH = −32 mA, IOL = 64 mA) and goes to high impedance when 1OE is high. |
| 4 | 2OE | input | Output-enable input for buffer 2; when high the 2Y output is forced to the high-impedance state, when low 2Y follows 2A. |
| 5 | 2A | input | Data input for bus-buffer channel 2, buffered onto 2Y when 2OE is low. |
| 6 | 2Y | tri_state | 3-state buffer output for channel 2; drives high/low following 2A when enabled (IOH = −32 mA, IOL = 64 mA) and goes to high impedance when 2OE is high. |
| 7 | GND | power_in | Ground reference pin for the device. |
| 8 | 3Y | tri_state | 3-state buffer output for channel 3; drives high/low following 3A when enabled (IOH = −32 mA, IOL = 64 mA) and goes to high impedance when 3OE is high. |
| 9 | 3A | input | Data input for bus-buffer channel 3, buffered onto 3Y when 3OE is low. |
| 10 | 3OE | input | Output-enable input for buffer 3; when high the 3Y output is forced to the high-impedance state, when low 3Y follows 3A. |
| 11 | 4Y | tri_state | 3-state buffer output for channel 4; drives high/low following 4A when enabled (IOH = −32 mA, IOL = 64 mA) and goes to high impedance when 4OE is high. |
| 12 | 4A | input | Data input for bus-buffer channel 4, buffered onto 4Y when 4OE is low. |
| 13 | 4OE | input | Output-enable input for buffer 4; when high the 4Y output is forced to the high-impedance state, when low 4Y follows 4A. |
| 14 | VCC | power_in | Supply voltage pin; recommended operating range 4.5 V to 5.5 V for the SN74ABT125 (absolute maximum −0.5 V to 7 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
SN74ABT125DR - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
sn74abt125dr-etched.step/sn74abt125dr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74abt125dr.step/sn74abt125dr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (30 pp, sha256
c05bef69c7bc9557, retrieved 2026-09-22, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).