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SN65MLVD047ADR

Public Made by Adom

by adom

Texas Instruments LVDS ICs, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SN65MLVD047ADR

Texas Instruments · LVDS ICs · SOIC-16

SN65MLVD047ADR from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 EN input Active-high driver enable input; per Table 7-1 the Y and Z outputs are high impedance when EN is low or open, and the driver is enabled only with EN high and the active-low enable low.
2 1A input Driver 1 LVTTL input with a built-in 360 kΩ pull-down, VIH of 2 V minimum and VIL of 0.8 V maximum.
3 2A input Driver 2 LVTTL input with a built-in 360 kΩ pull-down, VIH of 2 V minimum and VIL of 0.8 V maximum.
4 VCC power_in Supply pin; the recommended supply is 3 V minimum, 3.3 V nominal and 3.6 V maximum, with absolute maximum of 4 V.
5 GND power_in Circuit ground reference; all voltages except differential bus voltages are referenced to this terminal.
6 3A input Driver 3 LVTTL input with a built-in 360 kΩ pull-down, VIH of 2 V minimum and VIL of 0.8 V maximum.
7 4A input Driver 4 LVTTL input with a built-in 360 kΩ pull-down, VIH of 2 V minimum and VIL of 0.8 V maximum.
8 EN input Active-low driver enable input; per Table 7-1 the Y and Z outputs are high impedance when this input is high or open.
9 4Z output Inverting M-LVDS driver 4 output; bus terminal voltage must stay between -1.4 V and 3.8 V, and it is high impedance when the driver is disabled.
10 4Y output Non-inverting M-LVDS driver 4 output; bus terminal voltage must stay between -1.4 V and 3.8 V, and it is high impedance when the driver is disabled.
11 3Y output Non-inverting M-LVDS driver 3 output; bus terminal voltage must stay between -1.4 V and 3.8 V, and it is high impedance when the driver is disabled.
12 3Z output Inverting M-LVDS driver 3 output; bus terminal voltage must stay between -1.4 V and 3.8 V, and it is high impedance when the driver is disabled.
13 2Z output Inverting M-LVDS driver 2 output; bus terminal voltage must stay between -1.4 V and 3.8 V, and it is high impedance when the driver is disabled.
14 2Y output Non-inverting M-LVDS driver 2 output; bus terminal voltage must stay between -1.4 V and 3.8 V, and it is high impedance when the driver is disabled.
15 1Y output Non-inverting M-LVDS driver 1 output; bus terminal voltage must stay between -1.4 V and 3.8 V, and it is high impedance when the driver is disabled.
16 1Z output Inverting M-LVDS driver 1 output; bus terminal voltage must stay between -1.4 V and 3.8 V, and it is high impedance when the driver is disabled.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16
Category Interface
Pins 16

CAD (KiCad official)

  • Symbol: SN65MLVD047ADR
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: sn65mlvd047adr-etched.step / sn65mlvd047adr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn65mlvd047adr.step / sn65mlvd047adr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (26 pp, sha256 2fcd322db9d3325d, retrieved 2026-10-11, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF