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Contents

README

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SN65MLVD040RGZR

Texas Instruments · LVDS ICs · VQFN-48-EP(7x7)

SN65MLVD040RGZR from Texas Instruments, in a VQFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1DE input Channel 1 driver enable input, high level active, enables individual driver, internally pulled low when floating
2 VCC power_in Power supply voltage, 3.3V nominal, range 3.0V to 3.6V
3 2A bidirectional M-LVDS bus non-inverting input/output for channel 2
4 2B bidirectional M-LVDS bus inverting input/output for channel 2
5 2DE input Channel 2 driver enable input, high level active, enables individual driver, internally pulled low when floating
6 GND power_in Circuit ground, all GND pins must be connected to ground
7 GND power_in Circuit ground, all GND pins must be connected to ground
8 3DE input Channel 3 driver enable input, high level active, enables individual driver, internally pulled low when floating
9 3A bidirectional M-LVDS bus non-inverting input/output for channel 3
10 3B bidirectional M-LVDS bus inverting input/output for channel 3
11 VCC power_in Power supply voltage, 3.3V nominal, range 3.0V to 3.6V
12 4DE input Channel 4 driver enable input, high level active, enables individual driver, internally pulled low when floating
13 4A bidirectional M-LVDS bus non-inverting input/output for channel 4
14 4B bidirectional M-LVDS bus inverting input/output for channel 4
15 VCC power_in Power supply voltage, 3.3V nominal, range 3.0V to 3.6V
16 VCC power_in Power supply voltage, 3.3V nominal, range 3.0V to 3.6V
17 NC unconnected Not connected
18 GND power_in Circuit ground, all GND pins must be connected to ground
19 3RE input Channel 3 receiver enable input, low level active, enables individual receiver, internally pulled high when floating
20 3FSEN input Channel 3 fail-safe enable input, selects Type 1 (low) or Type 2 (high) receiver mode, internally pulled high when floating
21 4RE input Channel 4 receiver enable input, low level active, enables individual receiver, internally pulled high when floating
22 4FSEN input Channel 4 fail-safe enable input, selects Type 1 (low) or Type 2 (high) receiver mode, internally pulled high when floating
23 GND power_in Circuit ground, all GND pins must be connected to ground
24 VCC power_in Power supply voltage, 3.3V nominal, range 3.0V to 3.6V
25 4D input Driver data input for channel 4
26 4R output Receiver data output for channel 4
27 GND power_in Circuit ground, all GND pins must be connected to ground
28 3D input Driver data input for channel 3
29 3R output Receiver data output for channel 3
30 PDN input Power-down control input, device powers on when high, powers down with high-impedance outputs when low, internally pulled low when floating
31 GND power_in Circuit ground, all GND pins must be connected to ground
32 2D input Driver data input for channel 2
33 2R output Receiver data output for channel 2
34 GND power_in Circuit ground, all GND pins must be connected to ground
35 1D input Driver data input for channel 1
36 1R output Receiver data output for channel 1
37 VCC power_in Power supply voltage, 3.3V nominal, range 3.0V to 3.6V
38 GND power_in Circuit ground, all GND pins must be connected to ground
39 1FSEN input Channel 1 fail-safe enable input, selects Type 1 (low) or Type 2 (high) receiver mode, internally pulled high when floating
40 1RE input Channel 1 receiver enable input, low level active, enables individual receiver, internally pulled high when floating
41 2FSEN input Channel 2 fail-safe enable input, selects Type 1 (low) or Type 2 (high) receiver mode, internally pulled high when floating
42 2RE input Channel 2 receiver enable input, low level active, enables individual receiver, internally pulled high when floating
43 GND power_in Circuit ground, all GND pins must be connected to ground
44 NC unconnected Not connected; internal TI test pin, must remain unconnected
45 VCC power_in Power supply voltage, 3.3V nominal, range 3.0V to 3.6V
46 VCC power_in Power supply voltage, 3.3V nominal, range 3.0V to 3.6V
47 1A bidirectional M-LVDS bus non-inverting input/output for channel 1
48 1B bidirectional M-LVDS bus inverting input/output for channel 1
49 PowerPAD power_in Thermal pad connected to ground for heat dissipation, must be soldered to PCB

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-48-EP(7x7)
Category Interface
Pins 49

CAD (KiCad official)

  • Symbol: SN65MLVD040RGZR
  • Footprint: Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm
  • 3D model: VQFN-48-EP(7x7) (KiCad packages3D, STEP)
  • 3D model files: sn65mlvd040rgzr-etched.step / sn65mlvd040rgzr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn65mlvd040rgzr.step / sn65mlvd040rgzr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (34 pp, sha256 bc108889f288895f, retrieved 2026-10-01, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF