component

SN65LVEL11DGKR

Public Made by Adom

by adom

Texas Instruments Clock Buffers, Drivers, Distributors, VSSOP-8-0.65mm. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.

componentclock-timingsn65lvel11dgkrfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 6d ago
viewers sn65lvel11dgkr: viewers · Ray 6d ago
package.json Publish 0.1.0 · Ray 6d ago
page.json Set visibility: public · Ray 6d ago
README.md Publish 0.1.0 · Ray 6d ago
sn65lvel11dgkr-etched.glb Publish 0.1.0 · Ray 6d ago
sn65lvel11dgkr-etched.step sn65lvel11dgkr: factory component page (tier=mfr) · Ray 6d ago
sn65lvel11dgkr-hero.glb sn65lvel11dgkr: hero GLB from the etched model (keeps the MPN mark) · Ray 6d ago
sn65lvel11dgkr-hero.overlay.json Publish 0.1.0 · Ray 6d ago
sn65lvel11dgkr.glb Publish 0.1.0 · Ray 6d ago
sn65lvel11dgkr.kicad_mod Publish 0.1.0 · Ray 6d ago
sn65lvel11dgkr.kicad_sym Publish 0.1.0 · Ray 6d ago
sn65lvel11dgkr.lbr Publish 0.1.0 · Ray 6d ago
sn65lvel11dgkr.step Publish 0.1.0 · Ray 6d ago

SN65LVEL11DGKR

Texas Instruments · Clock Buffers, Drivers, Distributors · VSSOP-8-0.65mm

SN65LVEL11DGKR from Texas Instruments, in a VSSOP-8-0.65mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Q0 output True PECL/ECL output of channel 0.
2 Q0\ output Inverted PECL/ECL output of channel 0.
3 Q1 output True PECL/ECL output of channel 1.
4 Q1\ output Inverted PECL/ECL output of channel 1.
5 VEE power_in Negative supply; 0 V in PECL mode, -3.0 V to -3.8 V in NECL mode.
6 D\ input Inverted PECL/ECL data input with internal 75 kΩ pull-down resistor.
7 D input True PECL/ECL data input with internal 75 kΩ pull-down resistor.
8 VCC power_in Positive supply; 3.0 V to 3.8 V in PECL mode, 0 V in NECL mode.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VSSOP-8-0.65mm
Category Clock/Timing
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Power Supply Current (PECL) ICC 25 mA PECL: VCC = 3.3 V, VEE = 0.0 V; -40°C column 3
Output HIGH Voltage (PECL) VOH 2215 2420 mV PECL: VCC = 3.3 V, VEE = 0.0 V; outputs 50 Ω to VCC, 2.0 V; -40°C column 3
Output HIGH Voltage (PECL) VOH 2215 2286 2420 mV PECL: VCC = 3.3 V, VEE = 0.0 V; outputs 50 Ω to VCC, 2.0 V; 25°C column 3
Output LOW Voltage (PECL) VOL 1470 1680 mV PECL: VCC = 3.3 V, VEE = 0.0 V; outputs 50 Ω to VCC, 2.0 V; -40°C column 3
Output LOW Voltage (PECL) VOL 1470 1584 1680 mV PECL: VCC = 3.3 V, VEE = 0.0 V; outputs 50 Ω to VCC, 2.0 V; 25°C column 3
Input High Voltage (Single-Ended) (PECL) VIH 2135 2420 mV PECL: VCC = 3.3 V, VEE = 0.0 V; -40°C column 3
Input LOW Voltage (Single-Ended) (PECL) VIL 1490 1825 mV PECL: VCC = 3.3 V, VEE = 0.0 V; -40°C column 3
Input HIGH voltage common mode range (Differential), Vpp < 500 mV (PECL) VIHCMR 1.2 3.1 V PECL: VCC = 3.3 V, VEE = 0.0 V; Vpp < 500 mV; -40°C column 3
Input HIGH voltage common mode range (Differential), Vpp < 500 mV (PECL) VIHCMR 1.1 3.1 V PECL: VCC = 3.3 V, VEE = 0.0 V; Vpp < 500 mV; 25°C column 3
Input HIGH voltage common mode range (Differential), Vpp > 500 mV (PECL) VIHCMR 1.4 3.1 V PECL: VCC = 3.3 V, VEE = 0.0 V; Vpp > 500 mV; -40°C column 3
Input HIGH voltage common mode range (Differential), Vpp > 500 mV (PECL) VIHCMR 1.3 3.1 V PECL: VCC = 3.3 V, VEE = 0.0 V; Vpp > 500 mV; 25°C column 3
Input HIGH Current (PECL) IIH 150 µA PECL: VCC = 3.3 V, VEE = 0.0 V; -40°C column 3
Input LOW current, D (PECL) IIL 0.5 µA PECL: VCC = 3.3 V, VEE = 0.0 V; -40°C column 3
Input LOW current, complementary input D̄ (PECL) IIL -600 µA PECL: VCC = 3.3 V, VEE = 0.0 V; -40°C column 3
Propagation delay to output tPLH/tPHL 235 350 ps VCC = 3.3 V; VEE = 0.0 V; -40°C column 4
Output rise/fall times Q (20%-80%) tr/tf 150 300 ps VCC = 3.3 V; VEE = 0.0 V; -40°C column 4
Input swing (VPP) VPP 200 1000 mV VCC = 3.3 V; VEE = 0.0 V; -40°C column 4
Within device skew tSKEW 18 ps VCC = 3.3 V; VEE = 0.0 V; -40°C column 4
Device to device skew tSKEW 25 ps VCC = 3.3 V; VEE = 0.0 V; -40°C column 4
Absolute PECL mode supply voltage VCC 6 V VEE = 0 V 2
Absolute NECL mode power supply VEE -6 V VCC = 0 V 2
PECL mode input voltage VI 6 V VEE = 0 V; VI ≤ VCC 2
NECL mode input voltage VI -6 V VCC = 0 V; VI ≥ VEE 2
Output current, continuous 50 mA Continuous 2
Output current, surge 100 mA Surge 2
Operating temperature range TA -40 85 °C 2
Storage temperature range Tstg -65 150 °C 2
PECL positive supply voltage operating range VCC 3 3.8 V PECL mode, VEE = 0 V 1
Junction-to-board thermal resistance, SOIC-TSSOP θJB 120 °C/W Package SOIC-TSSOP 2
Junction-to-case thermal resistance, SOIC-TSSOP θJC 74 °C/W Package SOIC-TSSOP 2
Internal input pull down resistor 75 kΩ 2

CAD (KiCad official)

  • Symbol: SN65LVEL11DGKR
  • Footprint: Package_SO:VSSOP-8_2.3x2mm_P0.5mm
  • 3D model: VSSOP-8-0.65mm (KiCad packages3D, STEP)
  • 3D model files: sn65lvel11dgkr-etched.step / sn65lvel11dgkr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn65lvel11dgkr.step / sn65lvel11dgkr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (18 pp, sha256 9a00c70dae66e127, retrieved 2026-10-21, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF