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SN65LVDT390PWR

Texas Instruments · LVDS ICs · TSSOP-16

SN65LVDT390PWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Differential (LVDS) non-inverting receiver input; the A and B inputs are rated −0.5 V to 4 V absolute maximum.
2 1B input Differential (LVDS) inverting receiver input; the A and B inputs are rated −0.5 V to 4 V absolute maximum.
3 2A input Differential (LVDS) non-inverting receiver input; the A and B inputs are rated −0.5 V to 4 V absolute maximum.
4 2B input Differential (LVDS) inverting receiver input; the A and B inputs are rated −0.5 V to 4 V absolute maximum.
5 3A input Differential (LVDS) non-inverting receiver input; the A and B inputs are rated −0.5 V to 4 V absolute maximum.
6 3B input Differential (LVDS) inverting receiver input; the A and B inputs are rated −0.5 V to 4 V absolute maximum.
7 4A input Differential (LVDS) non-inverting receiver input; the A and B inputs are rated −0.5 V to 4 V absolute maximum.
8 4B input Differential (LVDS) inverting receiver input; the A and B inputs are rated −0.5 V to 4 V absolute maximum.
9 EN3,4 input Enable for channels 3 and 4; high enables the output, low forces the outputs to high impedance, and enable inputs are rated −0.5 V to 6 V with VIH ≥ 2 V and VIL ≤ 0.8 V.
10 4Y output LVTTL output of channel 4; recommended output current is −8 mA to 8 mA, absolute maximum −12 mA to 12 mA.
11 3Y output LVTTL output of channel 3; recommended output current is −8 mA to 8 mA, absolute maximum −12 mA to 12 mA.
12 GND power_in Ground reference for the device.
13 VCC power_in Supply voltage; recommended 3 V to 3.6 V (3.3 V nominal), absolute maximum −0.5 V to 4 V.
14 2Y output LVTTL output of channel 2; recommended output current is −8 mA to 8 mA, absolute maximum −12 mA to 12 mA.
15 1Y output LVTTL output of channel 1; recommended output current is −8 mA to 8 mA, absolute maximum −12 mA to 12 mA.
16 EN1,2 input Enable for channels 1 and 2; high enables the output, low forces the outputs to high impedance, and enable inputs are rated −0.5 V to 6 V with VIH ≥ 2 V and VIL ≤ 0.8 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Interface
Pins 16

CAD (KiCad official)

  • Symbol: SN65LVDT390PWR
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: sn65lvdt390pwr-etched.step / sn65lvdt390pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn65lvdt390pwr.step / sn65lvdt390pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (48 pp, sha256 6c5cbf83c73b9efd, retrieved 2026-10-07, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF