component
SN65LVDT390D
Public Made by Adomby adom
Texas Instruments LVDS ICs, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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SN65LVDT390D
Texas Instruments · LVDS ICs · SOIC-16
SN65LVDT390D from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Differential (LVDS) non-inverting input that yields a valid high output for a differential input of at least +100 mV within the input common-mode range. |
| 2 | 1B | input | Differential (LVDS) inverting input that yields a valid low output for a differential input of at most −100 mV within the input common-mode range. |
| 3 | 2A | input | Differential (LVDS) non-inverting input that yields a valid high output for a differential input of at least +100 mV within the input common-mode range. |
| 4 | 2B | input | Differential (LVDS) inverting input that yields a valid low output for a differential input of at most −100 mV within the input common-mode range. |
| 5 | 3A | input | Differential (LVDS) non-inverting input that yields a valid high output for a differential input of at least +100 mV within the input common-mode range. |
| 6 | 3B | input | Differential (LVDS) inverting input that yields a valid low output for a differential input of at most −100 mV within the input common-mode range. |
| 7 | 4A | input | Differential (LVDS) non-inverting input that yields a valid high output for a differential input of at least +100 mV within the input common-mode range. |
| 8 | 4B | input | Differential (LVDS) inverting input that yields a valid low output for a differential input of at most −100 mV within the input common-mode range. |
| 9 | EN3,4 | input | Enable for channels 3 and 4; the datasheet specifies VIH of at least 2 V and VIL of at most 0.8 V, and when low the outputs 3Y and 4Y are high-impedance. |
| 10 | 4Y | output | LVTTL output for channel 4, with output current limited to ±8 mA recommended and ±12 mA absolute maximum. |
| 11 | 3Y | output | LVTTL output for channel 3, with output current limited to ±8 mA recommended and ±12 mA absolute maximum. |
| 12 | GND | power_in | Ground reference for the device. |
| 13 | VCC | power_in | Supply voltage of 3 V minimum, 3.3 V nominal and 3.6 V maximum, with an absolute maximum of 4 V. |
| 14 | 2Y | output | LVTTL output for channel 2, with output current limited to ±8 mA recommended and ±12 mA absolute maximum. |
| 15 | 1Y | output | LVTTL output for channel 1, with output current limited to ±8 mA recommended and ±12 mA absolute maximum. |
| 16 | EN1,2 | input | Enable for channels 1 and 2; the datasheet specifies VIH of at least 2 V and VIL of at most 0.8 V, and when low the outputs 1Y and 2Y are high-impedance. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16 |
| Category | Interface |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
SN65LVDT390D - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
sn65lvdt390d-etched.step/sn65lvdt390d-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn65lvdt390d.step/sn65lvdt390d.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (48 pp, sha256
6c5cbf83c73b9efd, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).