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Contents

README

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SN65LVDS3487DR

Texas Instruments · LVDS ICs · SOIC-16

SN65LVDS3487DR from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input LVTTL input signal for driver channel 1; VIH min 2 V and VIL max 0.8 V per the recommended operating conditions.
2 1Y output Differential (LVDS) non-inverting output of driver channel 1, providing a minimum differential output magnitude of 247 mV into a 100-Ω load when enabled.
3 1Z output Differential (LVDS) inverting output of driver channel 1, complementary to 1Y, and high impedance when the driver is disabled.
4 1,2EN input Enable input for driver channels 1 and 2.
5 2Z output Differential (LVDS) inverting output of driver channel 2, complementary to 2Y, and high impedance when the driver is disabled.
6 2Y output Differential (LVDS) non-inverting output of driver channel 2, providing a minimum differential output magnitude of 247 mV into a 100-Ω load when enabled.
7 2A input LVTTL input signal for driver channel 2; VIH min 2 V and VIL max 0.8 V per the recommended operating conditions.
8 GND power_in Ground, the network ground terminal to which all supply and input voltages are referenced.
9 3A input LVTTL input signal for driver channel 3; VIH min 2 V and VIL max 0.8 V per the recommended operating conditions.
10 3Y output Differential (LVDS) non-inverting output of driver channel 3, providing a minimum differential output magnitude of 247 mV into a 100-Ω load when enabled.
11 3Z output Differential (LVDS) inverting output of driver channel 3, complementary to 3Y, and high impedance when the driver is disabled.
12 3,4EN input Enable input for driver channels 3 and 4.
13 4Z output Differential (LVDS) inverting output of driver channel 4, complementary to 4Y, and high impedance when the driver is disabled.
14 4Y output Differential (LVDS) non-inverting output of driver channel 4, providing a minimum differential output magnitude of 247 mV into a 100-Ω load when enabled.
15 4A input LVTTL input signal for driver channel 4; VIH min 2 V and VIL max 0.8 V per the recommended operating conditions.
16 VCC power_in Supply voltage, 3 V min, 3.3 V nominal, 3.6 V max per the recommended operating conditions.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16
Category Interface
Pins 16

CAD (KiCad official)

  • Symbol: SN65LVDS3487DR
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: sn65lvds3487dr-etched.step / sn65lvds3487dr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn65lvds3487dr.step / sn65lvds3487dr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (57 pp, sha256 7f0f885ccc1adfad, retrieved 2026-10-10, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF