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SN65LVDS31PWR
Public Made by Adomby adom
Texas Instruments LVDS ICs, TSSOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN65LVDS31PWR
Texas Instruments · LVDS ICs · TSSOP-16
SN65LVDS31PWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | LVTTL input signal for driver 1; accepts 0.8 V (low) or 2 V (high) logic levels |
| 2 | 1Y | tri_state | Non-inverting LVDS differential output for driver 1; 340 mV typical magnitude into 100 Ω load (paired with pin 3) |
| 3 | 1Z | tri_state | Inverting LVDS differential output for driver 1; 340 mV typical magnitude into 100 Ω load (paired with pin 2) |
| 4 | G | input | Active-high output enable input; driver outputs enabled when pulled high, high-impedance when low |
| 5 | 2Z | tri_state | Inverting LVDS differential output for driver 2; 340 mV typical magnitude into 100 Ω load (paired with pin 6) |
| 6 | 2Y | tri_state | Non-inverting LVDS differential output for driver 2; 340 mV typical magnitude into 100 Ω load (paired with pin 5) |
| 7 | 2A | input | LVTTL input signal for driver 2; accepts 0.8 V (low) or 2 V (high) logic levels |
| 8 | GND | power_in | Ground reference |
| 9 | 3A | input | LVTTL input signal for driver 3; accepts 0.8 V (low) or 2 V (high) logic levels |
| 10 | 3Y | tri_state | Non-inverting LVDS differential output for driver 3; 340 mV typical magnitude into 100 Ω load (paired with pin 11) |
| 11 | 3Z | tri_state | Inverting LVDS differential output for driver 3; 340 mV typical magnitude into 100 Ω load (paired with pin 10) |
| 12 | G/ | input | Active-low output enable input; driver outputs enabled when pulled low, high-impedance when high |
| 13 | 4Z | tri_state | Inverting LVDS differential output for driver 4; 340 mV typical magnitude into 100 Ω load (paired with pin 14) |
| 14 | 4Y | tri_state | Non-inverting LVDS differential output for driver 4; 340 mV typical magnitude into 100 Ω load (paired with pin 13) |
| 15 | 4A | input | LVTTL input signal for driver 4; accepts 0.8 V (low) or 2 V (high) logic levels |
| 16 | VCC | power_in | Supply voltage (3.0 to 3.6 V operating range, 3.3 V nominal) |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Interface |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
SN65LVDS31PWR - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
sn65lvds31pwr-etched.step/sn65lvds31pwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn65lvds31pwr.step/sn65lvds31pwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (57 pp, sha256
7f0f885ccc1adfad, retrieved 2026-09-21, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).