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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs sn65lvds1dbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray
README.md sn65lvds1dbvr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray
sn65lvds1dbvr-etched.fit.json sn65lvds1dbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
sn65lvds1dbvr-etched.glb sn65lvds1dbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
sn65lvds1dbvr-etched.step sn65lvds1dbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
sn65lvds1dbvr.glb Publish 0.1.0 · Ray
sn65lvds1dbvr.kicad_mod Publish 0.1.0 · Ray
sn65lvds1dbvr.kicad_sym Publish 0.1.0 · Ray
sn65lvds1dbvr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
sn65lvds1dbvr.step Publish 0.1.0 · Ray

SN65LVDS1DBVR

Texas Instruments · Buffer/Driver/Transceiver · SOT-23-5

SN65LVDS1DBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC power_in Supply voltage input. Recommended operating range 2.4 V to 3.6 V (nominal 3.3 V). Typical driver supply current 5.5 mA with 100 Ω load.
2 GND power_in Ground / negative supply reference for the device.
3 Z output Differential LVDS inverting output. Drives a differential pair with Y into a 100 Ω line;
4 Y output Differential LVDS non-inverting output. Drives a differential pair with Z into a 100 Ω line;
5 D input LVTTL input signal. High-level input voltage VIH ≥ 2 V (5 V tolerant), low-level input voltage VIL ≤ 0.8 V. Drives the LVDS differential output pair (Y, Z).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Logic
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • SN65LVDS1DBVR
  • SN65LVDS1DBVRDBVT
  • SN65LVDS1DBVRD
  • SN65LVDS1DBVRDR

CAD (KiCad official)

  • Symbol: SN65LVDS1DBVR
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: sn65lvds1dbvr-etched.step / sn65lvds1dbvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn65lvds1dbvr.step / sn65lvds1dbvr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
sn65lvds1dbvr.step 85 KB You want the bare part, or you mark your own boards.
sn65lvds1dbvr-etched.step 2.2 MB You want the part with SN65LVDS1DBVR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 543 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (44 pp, sha256 2830b1f2b732d16f, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF