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SN65LVDS122PWR

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Texas Instruments Signal Switches, Multiplexers, Decoders, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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SN65LVDS122PWR

Texas Instruments · Signal Switches, Multiplexers, Decoders · TSSOP-16

SN65LVDS122PWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1B input Inverting differential LVDS receiver input of channel 1; the input common-mode range is 0 V to 4 V and the differential input threshold is ±100 mV with 25 mV hysteresis.
2 1A input Non-inverting differential LVDS receiver input of channel 1; the input common-mode range is 0 V to 4 V and the absolute voltage range for A and B is -0.7 V to 4.3 V.
3 S0 input Logic select input that sets the internal configuration of the device together with S1; the high-level input is 2 V to 4 V and the low-level input is 0 V to 0.8 V.
4 1DE input Driver enable input for output channel 1; the high-level input is 2 V to 4 V and the low-level input is 0 V to 0.8 V, and the outputs go high-impedance when disabled.
5 S1 input Logic select input that sets the internal configuration of the device together with S0; the high-level input is 2 V to 4 V and the low-level input is 0 V to 0.8 V.
6 2A input Non-inverting differential LVDS receiver input of channel 2; the input common-mode range is 0 V to 4 V and the absolute voltage range for A and B is -0.7 V to 4.3 V.
7 2B input Inverting differential LVDS receiver input of channel 2; the input common-mode range is 0 V to 4 V and the differential input threshold is ±100 mV with 25 mV hysteresis.
8 GND power_in Network ground terminal; all voltages except differential I/O bus voltages are referenced to this pin.
9 GND power_in Network ground terminal; all voltages except differential I/O bus voltages are referenced to this pin.
10 2Y output Non-inverting differential LVDS driver output of channel 2 with a differential output voltage magnitude of 247 mV to 454 mV and a steady-state common-mode voltage of 1.125 V to 1.375 V.
11 2Z output Inverting differential LVDS driver output of channel 2 with a differential output voltage magnitude of 247 mV to 454 mV and a steady-state common-mode voltage of 1.125 V to 1.375 V.
12 2DE input Driver enable input for output channel 2; the high-level input is 2 V to 4 V and the low-level input is 0 V to 0.8 V, and the outputs go high-impedance when disabled.
13 1Z output Inverting differential LVDS driver output of channel 1 with a differential output voltage magnitude of 247 mV to 454 mV and a steady-state common-mode voltage of 1.125 V to 1.375 V.
14 1Y output Non-inverting differential LVDS driver output of channel 1 with a differential output voltage magnitude of 247 mV to 454 mV and a steady-state common-mode voltage of 1.125 V to 1.375 V.
15 VCC power_in Supply voltage pin; the recommended supply range is 3 V to 3.6 V (3.3 V nominal) and the absolute maximum is -0.5 V to 4 V.
16 VCC power_in Supply voltage pin; the recommended supply range is 3 V to 3.6 V (3.3 V nominal) and the absolute maximum is -0.5 V to 4 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Logic
Pins 16

CAD (KiCad official)

  • Symbol: SN65LVDS122PWR
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: sn65lvds122pwr-etched.step / sn65lvds122pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn65lvds122pwr.step / sn65lvds122pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (23 pp, sha256 b5aa094ef1e7ada6, retrieved 2026-10-11, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF