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SN65LVDS047PW

Texas Instruments · LVDS ICs · TSSOP-16

SN65LVDS047PW from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 EN input Driver enable input, with a 300 kΩ input network; drivers are enabled when EN is high with the complementary enable low or open (see truth table), otherwise outputs are high impedance.
2 DIN1 input Channel 1 LVDS driver logic input, VIL GND to 0.8 V and VIH 2 V to VCC.
3 DIN2 input Channel 2 LVDS driver logic input, VIL GND to 0.8 V and VIH 2 V to VCC.
4 VCC power_in Supply voltage, 3 V to 3.6 V recommended (3.3 V nominal), absolute maximum 4 V.
5 GND power_in Ground reference for the device.
6 DIN3 input Channel 3 LVDS driver logic input, VIL GND to 0.8 V and VIH 2 V to VCC.
7 DIN4 input Channel 4 LVDS driver logic input, VIL GND to 0.8 V and VIH 2 V to VCC.
8 EN input Complementary (active-low, overbar) driver enable input; drivers are enabled when it is low or open with the other enable high, otherwise outputs are high impedance.
9 DOUT4- output Channel 4 inverting LVDS driver output, about 310 mV typical differential output into 100 Ω, high impedance when disabled.
10 DOUT4+ output Channel 4 non-inverting LVDS driver output, about 310 mV typical differential output into 100 Ω, high impedance when disabled.
11 DOUT3+ output Channel 3 non-inverting LVDS driver output, about 310 mV typical differential output into 100 Ω, high impedance when disabled.
12 DOUT3- output Channel 3 inverting LVDS driver output, about 310 mV typical differential output into 100 Ω, high impedance when disabled.
13 DOUT2- output Channel 2 inverting LVDS driver output, about 310 mV typical differential output into 100 Ω, high impedance when disabled.
14 DOUT2+ output Channel 2 non-inverting LVDS driver output, about 310 mV typical differential output into 100 Ω, high impedance when disabled.
15 DOUT1+ output Channel 1 non-inverting LVDS driver output, about 310 mV typical differential output into 100 Ω, high impedance when disabled.
16 DOUT1- output Channel 1 inverting LVDS driver output, about 310 mV typical differential output into 100 Ω, high impedance when disabled.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Interface
Pins 16

CAD (KiCad official)

  • Symbol: SN65LVDS047PW
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: sn65lvds047pw-etched.step / sn65lvds047pw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn65lvds047pw.step / sn65lvds047pw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (18 pp, sha256 9323fb047eb660bc, retrieved 2026-10-10, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF