component
SN65LVDM050PW
Public Made by Adomby adom
Texas Instruments LVDS ICs, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 3d ago |
| viewers | 4d ago |
| package.json | 4d ago |
| page.json | 4d ago |
| README.md | 4d ago |
| sn65lvdm050pw-etched.fit.json | 3d ago |
| sn65lvdm050pw-etched.glb | 3d ago |
| sn65lvdm050pw-etched.step | 3d ago |
| sn65lvdm050pw.glb | 4d ago |
| sn65lvdm050pw.kicad_mod | 4d ago |
| sn65lvdm050pw.kicad_sym | 4d ago |
| sn65lvdm050pw.lbr | 4d ago |
| sn65lvdm050pw.step | 4d ago |
SN65LVDM050PW
Texas Instruments · LVDS ICs · TSSOP-16
SN65LVDM050PW from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1B | input | Receiver 1 inverting differential line input; receiver detects a 50-mV VID with up to 1 V of ground potential difference. |
| 2 | 1A | input | Receiver 1 non-inverting differential line input; VID = VA - VB ≥ 50 mV gives a high output on 1R. |
| 3 | 1R | output | Receiver 1 logic output, high for VID ≥ 50 mV or open-circuit inputs (failsafe), low for VID ≤ -50 mV. |
| 4 | RE | input | Receiver enable input shared by both receivers, LVTTL level and 5-V tolerant. |
| 5 | 2R | output | Receiver 2 logic output, high for VID ≥ 50 mV or open-circuit inputs (failsafe), low for VID ≤ -50 mV. |
| 6 | 2A | input | Receiver 2 non-inverting differential line input; VID = VA - VB ≥ 50 mV gives a high output on 2R. |
| 7 | 2B | input | Receiver 2 inverting differential line input; receiver detects a 50-mV VID with up to 1 V of ground potential difference. |
| 8 | GND | power_in | Ground. |
| 9 | 2D | input | Driver 2 logic input, LVTTL level and 5-V tolerant; open input drives Y low and Z high. |
| 10 | 2Y | output | Driver 2 non-inverting differential output, typically 340 mV into a 50-Ω load; high impedance when disabled or VCC < 1.5 V. |
| 11 | 2Z | output | Driver 2 inverting differential output, typically 340 mV into a 50-Ω load; high impedance when disabled or VCC < 1.5 V. |
| 12 | DE | input | Driver enable input shared by both drivers, LVTTL level and 5-V tolerant; drivers are high impedance when disabled. |
| 13 | 1Z | output | Driver 1 inverting differential output, typically 340 mV into a 50-Ω load; high impedance when disabled or VCC < 1.5 V. |
| 14 | 1Y | output | Driver 1 non-inverting differential output, typically 340 mV into a 50-Ω load; high impedance when disabled or VCC < 1.5 V. |
| 15 | 1D | input | Driver 1 logic input, LVTTL level and 5-V tolerant; open input drives Y low and Z high. |
| 16 | VCC | power_in | Single 3.3-V supply input. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Interface |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
SN65LVDM050PW - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
sn65lvdm050pw-etched.step/sn65lvdm050pw-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn65lvdm050pw.step/sn65lvdm050pw.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (41 pp, sha256
da1071ed34b491ab, retrieved 2026-10-01, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).