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Initial commit: component/sn65lvdm050pw

Ray ·b0f82fea0b ·4d ago
2 files changed +255
README.mdadded+52
@@ -0,0 +1,52 @@+# SN65LVDM050PW++**Texas Instruments** · LVDS ICs · TSSOP-16++SN65LVDM050PW from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1B | input | Receiver 1 inverting differential line input; receiver detects a 50-mV VID with up to 1 V of ground potential difference. |+| 2 | 1A | input | Receiver 1 non-inverting differential line input; VID = VA - VB ≥ 50 mV gives a high output on 1R. |+| 3 | 1R | output | Receiver 1 logic output, high for VID ≥ 50 mV or open-circuit inputs (failsafe), low for VID ≤ -50 mV. |+| 4 | RE | input | Receiver enable input shared by both receivers, LVTTL level and 5-V tolerant. |+| 5 | 2R | output | Receiver 2 logic output, high for VID ≥ 50 mV or open-circuit inputs (failsafe), low for VID ≤ -50 mV. |+| 6 | 2A | input | Receiver 2 non-inverting differential line input; VID = VA - VB ≥ 50 mV gives a high output on 2R. |+| 7 | 2B | input | Receiver 2 inverting differential line input; receiver detects a 50-mV VID with up to 1 V of ground potential difference. |+| 8 | GND | power_in | Ground. |+| 9 | 2D | input | Driver 2 logic input, LVTTL level and 5-V tolerant; open input drives Y low and Z high. |+| 10 | 2Y | output | Driver 2 non-inverting differential output, typically 340 mV into a 50-Ω load; high impedance when disabled or VCC < 1.5 V. |+| 11 | 2Z | output | Driver 2 inverting differential output, typically 340 mV into a 50-Ω load; high impedance when disabled or VCC < 1.5 V. |+| 12 | DE | input | Driver enable input shared by both drivers, LVTTL level and 5-V tolerant; drivers are high impedance when disabled. |+| 13 | 1Z | output | Driver 1 inverting differential output, typically 340 mV into a 50-Ω load; high impedance when disabled or VCC < 1.5 V. |+| 14 | 1Y | output | Driver 1 non-inverting differential output, typically 340 mV into a 50-Ω load; high impedance when disabled or VCC < 1.5 V. |+| 15 | 1D | input | Driver 1 logic input, LVTTL level and 5-V tolerant; open input drives Y low and Z high. |+| 16 | VCC | power_in | Single 3.3-V supply input. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TSSOP-16 |+| Category | Interface |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `SN65LVDM050PW`+- Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm`+- 3D model: TSSOP-16 (KiCad packages3D, STEP)+- 3D model files: `sn65lvdm050pw-etched.step` / `sn65lvdm050pw-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn65lvdm050pw.step` / `sn65lvdm050pw.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn65lvdm050.pdf) (41 pp, sha256 `da1071ed34b491ab`, retrieved 2026-10-01, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn65lvdm050pw-datasheet.pdf)
page.jsonadded+203
@@ -0,0 +1,203 @@+{+  "slug": "sn65lvdm050pw",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments LVDS ICs, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "interface",+    "sn65lvdm050pw",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "sn65lvdm050pw.kicad_sym",+    "sn65lvdm050pw.kicad_mod",+    "sn65lvdm050pw.glb",+    "sn65lvdm050pw.step",+    "sn65lvdm050pw.lbr",+    "docs/hero.png",+    "docs/sn65lvdm050pw-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "SN65LVDM050PW",+    "manufacturer": "Texas Instruments",+    "package": "TSSOP-16",+    "pin_count": 16,+    "category": "Interface",+    "subcategory": "LVDS ICs",+    "datasheet": "https://www.ti.com/lit/ds/symlink/sn65lvdm050.pdf",+    "parts": {+      "symbol": "sn65lvdm050pw.kicad_sym",+      "footprint": "sn65lvdm050pw.kicad_mod",+      "model_3d": "sn65lvdm050pw-etched.glb",+      "model_3d_plain": "sn65lvdm050pw.glb",+      "model_3d_step": "sn65lvdm050pw-etched.step",+      "model_3d_step_plain": "sn65lvdm050pw.step",+      "lbr": "sn65lvdm050pw.lbr"+    },+    "distributor_links": {+      "lcsc": "C1543811",+      "digikey": "296-12020-5-ND",+      "mouser": "595-SN65LVDM050PW"+    },+    "distributor_check": {+      "checked_at": "2026-10-01T07:03:22Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-12020-5-ND",+        "status": "found"+      },+      "mouser": {+        "pn": "595-SN65LVDM050PW",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "1B",+        "type": "input",+        "description": "Receiver 1 inverting differential line input; receiver detects a 50-mV VID with up to 1 V of ground potential difference."+      },+      {+        "number": "2",+        "name": "1A",+        "type": "input",+        "description": "Receiver 1 non-inverting differential line input; VID = VA - VB ≥ 50 mV gives a high output on 1R."+      },+      {+        "number": "3",+        "name": "1R",+        "type": "output",+        "description": "Receiver 1 logic output, high for VID ≥ 50 mV or open-circuit inputs (failsafe), low for VID ≤ -50 mV."+      },+      {+        "number": "4",+        "name": "RE",+        "type": "input",+        "description": "Receiver enable input shared by both receivers, LVTTL level and 5-V tolerant."+      },+      {+        "number": "5",+        "name": "2R",+        "type": "output",+        "description": "Receiver 2 logic output, high for VID ≥ 50 mV or open-circuit inputs (failsafe), low for VID ≤ -50 mV."+      },+      {+        "number": "6",+        "name": "2A",+        "type": "input",+        "description": "Receiver 2 non-inverting differential line input; VID = VA - VB ≥ 50 mV gives a high output on 2R."+      },+      {+        "number": "7",+        "name": "2B",+        "type": "input",+        "description": "Receiver 2 inverting differential line input; receiver detects a 50-mV VID with up to 1 V of ground potential difference."+      },+      {+        "number": "8",+        "name": "GND",+        "type": "power_in",+        "description": "Ground."+      },+      {+        "number": "9",+        "name": "2D",+        "type": "input",+        "description": "Driver 2 logic input, LVTTL level and 5-V tolerant; open input drives Y low and Z high."+      },+      {+        "number": "10",+        "name": "2Y",+        "type": "output",+        "description": "Driver 2 non-inverting differential output, typically 340 mV into a 50-Ω load; high impedance when disabled or VCC < 1.5 V."+      },+      {+        "number": "11",+        "name": "2Z",+        "type": "output",+        "description": "Driver 2 inverting differential output, typically 340 mV into a 50-Ω load; high impedance when disabled or VCC < 1.5 V."+      },+      {+        "number": "12",+        "name": "DE",+        "type": "input",+        "description": "Driver enable input shared by both drivers, LVTTL level and 5-V tolerant; drivers are high impedance when disabled."+      },+      {+        "number": "13",+        "name": "1Z",+        "type": "output",+        "description": "Driver 1 inverting differential output, typically 340 mV into a 50-Ω load; high impedance when disabled or VCC < 1.5 V."+      },+      {+        "number": "14",+        "name": "1Y",+        "type": "output",+        "description": "Driver 1 non-inverting differential output, typically 340 mV into a 50-Ω load; high impedance when disabled or VCC < 1.5 V."+      },+      {+        "number": "15",+        "name": "1D",+        "type": "input",+        "description": "Driver 1 logic input, LVTTL level and 5-V tolerant; open input drives Y low and Z high."+      },+      {+        "number": "16",+        "name": "VCC",+        "type": "power_in",+        "description": "Single 3.3-V supply input."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [],+        "pages_sent": 6,+        "cost_usd": 0.1369,+        "at": "2026-10-01T07:03:06"+      },+      "datasheet": {+        "url": "https://www.ti.com/lit/ds/symlink/sn65lvdm050.pdf",+        "pages": 41,+        "sha256": "da1071ed34b491ab",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 16,+        "described": 16,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file