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SN65LVCP22PW

Public Made by Adom

by adom

Texas Instruments Signal Switches, Multiplexers, Decoders, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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SN65LVCP22PW

Texas Instruments · Signal Switches, Multiplexers, Decoders · TSSOP-16

SN65LVCP22PW from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SEL1 input CMOS/TTL select input that picks the source for OUT1 (IN0 or IN1) per the function table; VIH 2 V to VCC, VIL GND to 0.8 V.
2 SEL0 input CMOS/TTL select input that picks the source for OUT0 (IN0 or IN1) per the function table; VIH 2 V to VCC, VIL GND to 0.8 V.
3 IN0+ input Non-inverting input of receiver 0, accepting LVDS, LVPECL or CML with a 0 V to 4 V input range.
4 IN0- input Inverting input of receiver 0, accepting LVDS, LVPECL or CML with a 0 V to 4 V input range.
5 VCC power_in Supply voltage, 3 V to 3.6 V recommended (3.3 V nominal), absolute maximum 4 V.
6 IN1+ input Non-inverting input of receiver 1, accepting LVDS, LVPECL or CML with a 0 V to 4 V input range.
7 IN1- input Inverting input of receiver 1, accepting LVDS, LVPECL or CML with a 0 V to 4 V input range.
8 NC unconnected No internal connection.
9 NC unconnected No internal connection.
10 OUT1- output Inverting LVDS driver output of channel 1, with 270 mV to 475 mV differential output voltage into 75 Ω.
11 OUT1+ output Non-inverting LVDS driver output of channel 1, with 270 mV to 475 mV differential output voltage into 75 Ω.
12 GND power_in Ground reference for the device.
13 OUT0- output Inverting LVDS driver output of channel 0, with 270 mV to 475 mV differential output voltage into 75 Ω.
14 OUT0+ output Non-inverting LVDS driver output of channel 0, with 270 mV to 475 mV differential output voltage into 75 Ω.
15 EN1 input CMOS/TTL enable input for output 1; low puts the output in high impedance, VIH 2 V to VCC, VIL GND to 0.8 V.
16 EN0 input CMOS/TTL enable input for output 0; low puts the output in high impedance, VIH 2 V to VCC, VIL GND to 0.8 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Logic
Pins 16

CAD (KiCad official)

  • Symbol: SN65LVCP22PW
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: sn65lvcp22pw-etched.step / sn65lvcp22pw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn65lvcp22pw.step / sn65lvcp22pw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (23 pp, sha256 14e89216bc06a636, retrieved 2026-10-06, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF