Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

SN65LBC184P

Texas Instruments · RS-485 / RS-422 ICs · DIP-8

SN65LBC184P from Texas Instruments, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 R output Receiver data output: with RE low it goes high when VID > VIT+ and low when VID < VIT-, and it is high-impedance when RE is high.
2 RE input Active-LOW receiver enable; the receiver is enabled when this pin is logic low and disabled (R high-impedance) when it is logic high.
3 DE input Active-HIGH driver enable; when DE is logic low both bus outputs A and B are high-impedance, and the driver is active when DE is high.
4 D input Driver data input: a logic high drives A high and B low, and a logic low drives A low and B high, when DE is high.
5 GND power_in Reference potential, local device ground; all voltages are referenced to this network ground terminal.
6 A bidirectional Bus input/output: driver output or receiver input, complementary to B; bus terminal voltage range is -7 V to 12 V (recommended operating conditions) with absolute maximum continuous range of -15 V to 15 V.
7 B bidirectional Bus input/output: driver output or receiver input, complementary to A; bus terminal voltage range is -7 V to 12 V (recommended operating conditions) with absolute maximum continuous range of -15 V to 15 V.
8 VCC power_in Supply pin; the datasheet specifies a supply voltage of 4.75 V to 5.25 V (5 V nominal) with an absolute maximum of 7 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package DIP-8
Category Interface
Pins 8

CAD (KiCad official)

  • Symbol: SN65LBC184P
  • Footprint: Package_DIP:DIP-8_W7.62mm
  • 3D model: DIP-8 (KiCad packages3D, STEP)
  • 3D model files: sn65lbc184p-etched.step / sn65lbc184p-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn65lbc184p.step / sn65lbc184p.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (31 pp, sha256 18a565a2c37785b9, retrieved 2026-10-10, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF