component
SN65HVD72DRBT
Public Made by Adomby adom
Texas Instruments RS-485 / RS-422 ICs, HVSON-8-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SN65HVD72DRBT
Texas Instruments · RS-485 / RS-422 ICs · HVSON-8-EP(3x3)
SN65HVD72DRBT from Texas Instruments, in a HVSON-8-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | R | output | Receive data output of the receiver, which the datasheet describes as a digital output. |
| 2 | RE | input | Active-low receiver enable digital input; the receiver is enabled when this pin is driven low. |
| 3 | DE | input | Active-high driver enable digital input that enables the driver when driven high. |
| 4 | D | input | Driver data digital input that sets the driver bus output state. |
| 5 | GND | power_in | Local device ground, the reference potential for the device. |
| 6 | A | bidirectional | Bus I/O terminal, driver output or receiver input, complementary to B; bus inputs are rated -13 V to 16.5 V per the absolute maximum ratings. |
| 7 | B | bidirectional | Bus I/O terminal, driver output or receiver input, complementary to A; bus inputs are rated -13 V to 16.5 V per the absolute maximum ratings. |
| 8 | VCC | power_in | Supply pin; the device is powered from a 3 V to 3.6 V supply (absolute maximum VCC is -0.5 V to 5 V). |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HVSON-8-EP(3x3) |
| Category | Interface |
| Pins | 9 |
CAD (KiCad official)
- Symbol:
SN65HVD72DRBT - Footprint:
Package_SON:HVSON-8-1EP_3x3mm_P0.65mm_EP1.6x2.4mm - 3D model: HVSON-8-EP(3x3), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal VQFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
sn65hvd72drbt-etched.step/sn65hvd72drbt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn65hvd72drbt.step/sn65hvd72drbt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (46 pp, sha256
34f5900786acbc46, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SN65HVD72DRBT
**Texas Instruments** · RS-485 / RS-422 ICs · HVSON-8-EP(3x3)
SN65HVD72DRBT from Texas Instruments, in a HVSON-8-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | R | output | Receive data output of the receiver, which the datasheet describes as a digital output. |
| 2 | RE | input | Active-low receiver enable digital input; the receiver is enabled when this pin is driven low. |
| 3 | DE | input | Active-high driver enable digital input that enables the driver when driven high. |
| 4 | D | input | Driver data digital input that sets the driver bus output state. |
| 5 | GND | power_in | Local device ground, the reference potential for the device. |
| 6 | A | bidirectional | Bus I/O terminal, driver output or receiver input, complementary to B; bus inputs are rated -13 V to 16.5 V per the absolute maximum ratings. |
| 7 | B | bidirectional | Bus I/O terminal, driver output or receiver input, complementary to A; bus inputs are rated -13 V to 16.5 V per the absolute maximum ratings. |
| 8 | VCC | power_in | Supply pin; the device is powered from a 3 V to 3.6 V supply (absolute maximum VCC is -0.5 V to 5 V). |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HVSON-8-EP(3x3) |
| Category | Interface |
| Pins | 9 |
## CAD (KiCad official)
- Symbol: `SN65HVD72DRBT`
- Footprint: `Package_SON:HVSON-8-1EP_3x3mm_P0.65mm_EP1.6x2.4mm`
- 3D model: HVSON-8-EP(3x3), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal VQFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files: `sn65hvd72drbt-etched.step` / `sn65hvd72drbt-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn65hvd72drbt.step` / `sn65hvd72drbt.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn65hvd75) (46 pp, sha256 `34f5900786acbc46`, retrieved 2026-10-08, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sn65hvd72drbt-datasheet.pdf)