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Contents

README

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SN65HVD255DR

Texas Instruments · CAN Transceivers · SOIC-8

SN65HVD255DR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 TXD input CAN transmit data input, driven LOW for dominant bus state and HIGH for recessive bus state.
2 GND power_in Ground connection.
3 VCC power_in Transceiver 5-V supply voltage.
4 RXD output CAN receive data output, driven LOW for dominant bus state and HIGH for recessive bus state.
5 NC unconnected No Connect on SN65HVD255 device.
6 CANL bidirectional Low level CAN bus line with differential signaling interface.
7 CANH bidirectional High level CAN bus line with differential signaling interface.
8 S input Mode select pin for silent mode operation, active high.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Interface
Pins 8

CAD (KiCad official)

  • Symbol: SN65HVD255DR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: sn65hvd255dr-etched.step / sn65hvd255dr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn65hvd255dr.step / sn65hvd255dr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (37 pp, sha256 7a33bc610690ae8f, retrieved 2026-10-01, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF