component
SN65HVD235QDRQ1
Public Made by Adomby adom
Texas Instruments CAN Transceivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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|---|---|
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| viewers | 23h ago |
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| page.json | 23h ago |
| README.md | 23h ago |
| sn65hvd235qdrq1-etched.glb | 23h ago |
| sn65hvd235qdrq1-etched.step | 23h ago |
| sn65hvd235qdrq1-hero.glb | 23h ago |
| sn65hvd235qdrq1-hero.overlay.json | 23h ago |
| sn65hvd235qdrq1.glb | 23h ago |
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| sn65hvd235qdrq1.step | 23h ago |
SN65HVD235QDRQ1
Texas Instruments · CAN Transceivers · SOIC-8
SN65HVD235QDRQ1 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | TXD | input | CAN transmit data input, LOW for dominant and HIGH for recessive bus states, with VIH of 2 V to 5.5 V and VIL of 0 V to 0.8 V. |
| 2 | GND | power_in | Ground connection; all voltages except the differential bus voltages are referenced to the network ground pin. |
| 3 | VCC | power_in | Transceiver 3.3 V supply, recommended range 3 V to 3.6 V with an absolute maximum of 7 V. |
| 4 | RXD | output | CAN receive data output, LOW for dominant and HIGH for recessive bus states, with receiver output current limited to ±10 mA. |
| 5 | AB | input | SN65HVD235-Q1 autobaud loopback mode input; it can be tied to ground or left open because an internal pulldown biases it toward ground. |
| 6 | CANL | bidirectional | Low-level CAN bus line, rated to ±36 V absolute with a recommended common-mode range of −7 V to 12 V. |
| 7 | CANH | bidirectional | High-level CAN bus line, rated to ±36 V absolute with a recommended common-mode range of −7 V to 12 V. |
| 8 | RS | input | Mode-select pin: tie to GND for high-speed mode, to VCC for low-power standby, or through 10 kΩ to 100 kΩ to GND for slope control, with absolute input voltage limits of −0.5 V to 7 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Interface |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
SN65HVD235QDRQ1 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
sn65hvd235qdrq1-etched.step/sn65hvd235qdrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn65hvd235qdrq1.step/sn65hvd235qdrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (36 pp, sha256
85a3f00125618eef, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).