Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

SN65HVD233MDREP

Texas Instruments · CAN Transceivers · SOIC-8

SN65HVD233MDREP from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 D input LVTTL-compatible driver input; low level (≤0.33 V) selects dominant CAN bus state, high level (>0.33 V) selects recessive state; 5-V tolerant input with input current range ±30 µA.
2 GND power_in Ground reference for the device.
3 VCC power_in Power supply input; rated supply voltage range 3.0 to 3.6 V nominal with -0.3 to 7 V absolute maximum.
4 R output Differential receiver output; low when bus is dominant (
5 LBK input Logic input for loopback and diagnostic mode; high level (>0.75 VCC) places bus output terminals in high-impedance state and enables driver input (D) to receiver output (R) loopback without disturbing the CAN bus; internal pull-down if left open.
6 CANL bidirectional Differential CAN bus low terminal; ±36 V transient overvoltage protection with 100 Ω test impedance; -7 V to 12 V common-mode range; input impedance 20 to 50 kΩ; 40 pF input capacitance.
7 CANH bidirectional Differential CAN bus high terminal; ±36 V transient overvoltage protection with 100 Ω test impedance; -7 V to 12 V common-mode range; input impedance 20 to 50 kΩ; 40 pF input capacitance.
8 RS input Slope control and standby mode input; connection to ground selects high-speed mode (0 Ω), adjustable slope control via 10-100 kΩ resistor to ground (2-15 V/µs slew rate), or low-power standby mode when >0.75 VCC applied (200 µA typical standby current).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Interface
Pins 8

CAD (KiCad official)

  • Symbol: SN65HVD233MDREP
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: sn65hvd233mdrep-etched.step / sn65hvd233mdrep-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn65hvd233mdrep.step / sn65hvd233mdrep.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (29 pp, sha256 adb069f294598821, retrieved 2026-09-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF