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docs sn65hvd1780dr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json sn65hvd1780dr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md sn65hvd1780dr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray
sn65hvd1780dr-etched.fit.json sn65hvd1780dr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
sn65hvd1780dr-etched.glb sn65hvd1780dr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
sn65hvd1780dr-etched.step sn65hvd1780dr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
sn65hvd1780dr.glb Publish 0.1.0 · Ray
sn65hvd1780dr.kicad_mod Publish 0.1.0 · Ray
sn65hvd1780dr.kicad_sym Publish 0.1.0 · Ray
sn65hvd1780dr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
sn65hvd1780dr.step Publish 0.1.0 · Ray

SN65HVD1780DR

Texas Instruments · RS-485 / RS-422 ICs · SOIC-8

SN65HVD1780DR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 R output Receiver data output. CMOS-level digital output driven by the differential receiver comparing A and B bus inputs.
2 RE input Receiver enable (active low). Drive low to enable the receiver output R; drive high to place R in high-impedance state.
3 DE input Driver enable (active high). Drive high to enable the differential driver onto the A/B bus; drive low to place driver outputs in high-impedance state.
4 D input Driver data input. CMOS-level digital input; logic level is transmitted differentially onto the A/B bus when DE is high.
5 GND power_in Local device ground reference.
6 A bidirectional Non-inverting RS-485 bus I/O. Driver output or receiver input (complementary to B). Fault-protected to >±70 V, ±16-kV HBM ESD.
7 B bidirectional Inverting RS-485 bus I/O. Driver output or receiver input (complementary to A). Fault-protected to >±70 V, ±16-kV HBM ESD.
8 VCC power_in Supply voltage input. Operating range 3.15 V to 5.5 V (nominal 5 V); absolute max 7 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Interface
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • SN65HVD1780DR
  • SN65HVD1780DRD
  • SN65HVD1780DRP

CAD (KiCad official)

  • Symbol: SN65HVD1780DR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: sn65hvd1780dr-etched.step / sn65hvd1780dr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn65hvd1780dr.step / sn65hvd1780dr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (34 pp, sha256 f8736dab94b48730, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF