component
SN65HVD12IDREP
Public Made by Adomby adom
Texas Instruments RS-485 / RS-422 ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN65HVD12IDREP
Texas Instruments · RS-485 / RS-422 ICs · SOIC-8
SN65HVD12IDREP from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | R | output | Receiver output that is high when VID ≥ -0.01 V and low when VID ≤ -0.2 V, and goes high-impedance when RE is at VCC. |
| 2 | RE | input | Active-low receiver enable whose high-level input must be at least 2 V and low-level input at most 0.8 V; driving it to VCC disables the receiver. |
| 3 | DE | input | Active-high driver enable whose high-level input must be at least 2 V and low-level input at most 0.8 V; driving it low disables the driver outputs. |
| 4 | D | input | Driver data input whose high-level input must be at least 2 V and low-level input at most 0.8 V, with the bus outputs following it when DE is high. |
| 5 | GND | power_in | Network ground terminal that is the reference for all voltages except the differential bus voltages. |
| 6 | A | bidirectional | Driver differential output and receiver differential input (non-inverting bus terminal), rated for bus voltages from -9 V to 14 V absolute maximum and -7 V to 12 V as a recommended bus terminal voltage. |
| 7 | B | bidirectional | Driver differential output and receiver differential input (inverting bus terminal), rated for bus voltages from -9 V to 14 V absolute maximum and -7 V to 12 V as a recommended bus terminal voltage. |
| 8 | VCC | power_in | Supply voltage pin that must be held between 3 V and 3.6 V per the recommended operating conditions. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Interface |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
SN65HVD12IDREP - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
sn65hvd12idrep-etched.step/sn65hvd12idrep-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn65hvd12idrep.step/sn65hvd12idrep.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (27 pp, sha256
f1281ae52fc19591, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).