component

SN65HVD11EIM

Public Made by Adom

by adom

HGSEMI RS-485 / RS-422 ICs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentinterfacesn65hvd11eimfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
sn65hvd11eim / README.md
History Download
Ray Publish 0.1.0 f5f6797 6d ago

SN65HVD11EIM

HGSEMI · RS-485 / RS-422 ICs · SOP-8

SN65HVD11EIM from HGSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 R output Receiver data output: goes low when VID ≤ -0.2 V and high when VID ≥ -0.01 V with RE low, is high impedance when RE is high, and the receiver output current is limited to ±11 mA.
2 RE input Active-low receiver enable: driving it high disables the receiver and puts R in high impedance, with VIH of 2 V minimum and VIL of 0.8 V maximum.
3 DE input Active-high driver enable: the driver is disabled when DE is low, with VIH of 2 V minimum and VIL of 0.8 V maximum, and DE low with RE high for 300 ns or more places the device in low-power standby.
4 D input Driver data input: logic input with VIH of 2 V minimum and VIL of 0.8 V maximum, and an input voltage range of -0.5 V to VCC + 0.5 V.
5 GND power_in Network ground terminal to which all voltages except the differential bus voltages are referenced.
6 A bidirectional Driver differential output and receiver differential input bus terminal, with an absolute maximum voltage range of -9 V to 14 V and a recommended bus common-mode range of -7 V to 12 V.
7 B bidirectional Driver differential output and receiver differential input bus terminal, with an absolute maximum voltage range of -9 V to 14 V and a recommended bus common-mode range of -7 V to 12 V.
8 VCC power_in Supply voltage: recommended 3 V to 3.6 V (3.3 V typical), with an absolute maximum of 6 V.

Key specifications

Parameter Value
Manufacturer HGSEMI
Package SOP-8
Category Interface
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 3 3.6 V 3
Voltage at any bus terminal (separately or common mode) VI or VIC -7 12 V 3
High-level input voltage D, DE, RE VIH 2 V 3
Low-level input voltage D, DE, RE VIL 0 0.8 V 3
Differential input voltage VID -12 12 V Figure 7 3
High-level output current (driver) IOH -60 mA Driver 3
High-level output current (receiver) IOH -8 mA Receiver 3
Low-level output current (driver) IOL 60 mA Driver 3
Low-level output current (receiver) IOL 8 mA Receiver 3
Differential load resistance RL 54 60 Ω 3
Differential load capacitance CL 50 pF 3
Signaling rate (HVD11) 10 Mbps 3
Junction temperature (recommended) TJ 145 °C 3
Supply voltage range VCC -0.3 6 V 2
Voltage range at A or B -9 14 V 2
Input voltage range at D, DE, R or RE -0.5 V 2
Voltage input range, transient pulse, A and B -50 50 V through 100 Ω, see Figure 11 2
Receiver output current IO -11 11 mA 2
Human body model electrostatic discharge -16 16 kV A, B, and GND 2
Human body model electrostatic discharge -4 4 kV All pins 2
Junction temperature (absolute maximum) TJ 170 °C 2
Input clamp voltage VIK -1.5 V II = -18 mA 3
Differential output voltage /VOD/ 2 V IO = 0 3
Differential output voltage /VOD/ 1.5 V RL = 54 Ω, See Figure 1 3
Change in magnitude of differential output voltage Δ/VOD/ -0.2 0.2 V See Figure 1 and Figure 2 3
Peak-to-peak common-mode output voltage VOC(PP) 400 mV 3
Steady-state common-mode output voltage VOC(SS) 1.4 2.5 V See Figure 3 3
Short-circuit output current IOS -250 250 mA -7 V ≤ VO ≤ 12 V 3
Input current (D) II -100 0 μA 3
Input current (DE) II 0 100 μA 3
Supply current (driver enabled, receiver disabled) ICC 9 15.5 mA RE at VCC, Receiver disabled and D & DE at VCC, driver enabled No load 3
Supply current (standby) ICC 1 5 μA RE at VCC, D at VCC, Receiver disabled and DE at 0 V, driver disabled (standby) No load 3
Propagation delay time, low-to-high-level output (HVD11) tPLH 18 25 40 ns 4
Propagation delay time, high-to-low-level output (HVD11) tPHL 18 25 40 ns 4
Differential output signal rise time (HVD11) tr 10 20 30 ns RL = 54 Ω, CL = 50 pF, See Figure 4 4
Differential output signal fall time (HVD11) tf 10 20 30 ns RL = 54 Ω, CL = 50 pF, See Figure 4 4
Pulse skew (/tPHL, tPLH/) (HVD11) tsk(p) 2.5 ns 4
Propagation delay time, high-impedance-to-high-level output (HVD11) tPZH 55 ns RL = 110 Ω, RE at 0 V, See Figure 5 4
Propagation delay time, high-level-to-high-impedance output (HVD11) tPHZ 55 ns RL = 110 Ω, RE at 0 V, See Figure 5 4
Propagation delay time, high-impedance-to-low-level output (HVD11) tPZL 55 ns RL = 110 Ω, RE at 0 V, See Figure 6 4
Propagation delay time, low-level-to-high-impedance output (HVD11) tPLZ 75 ns RL = 110 Ω, RE at 0 V, See Figure 6 4
Positive-going input threshold voltage VIT+ -0.065 -0.01 V IO = -8 mA 5
Negative-going input threshold voltage VIT- -0.2 -0.1 V IO = 8 mA 5
Hysteresis voltage (VIT+ - VIT-) Vhys 35 mV 5
High-level output voltage VOH 2.4 V VID = 200 mV, IOH = -8 mA, See Figure 7 5
Low-level output voltage VOL 0.4 V VID = -200 mV, IOL = 8 mA, See Figure 7 5
High-impedance-state output current IOZ -1 1 μA VO = 0 or VCC, RE at VCC 5
Bus input current (HVD11, HVD12) II 0.05 0.11 mA VA or VB = 12 V 5
Bus input current (HVD11, HVD12) II -0.1 -0.05 mA Other input at 0 V; VA or VB = -7 V 5
Supply current (receiver enabled, driver disabled) ICC 4 8 mA RE at 0 V, Receiver enabled and D & DE at 0 V, driver disabled No load 5
Supply current (standby) ICC 1 5 μA RE at VCC, D at VCC, Receiver disabled and driver disabled (standby) No load 5
Propagation delay time, low-to-high-level output (HVD11) tPLH 30 55 70 ns VID = -1.5 V to 1.5 V, CL = 15 pF, See Figure 8 6
Propagation delay time, high-to-low-level output (HVD11) tPHL 30 55 70 ns VID = -1.5 V to 1.5 V, CL = 15 pF, See Figure 8 6
Output enable time to high level tPZH 15 ns CL = 15 pF, DE at 3 V, See Figure 9 6
Output enable time to low level tPZL 15 ns CL = 15 pF, DE at 3 V, See Figure 9 6
Output disable time from high level tPHZ 20 ns CL = 15 pF, DE at 3 V, See Figure 9 6
Output disable time from low level tPLZ 15 ns CL = 15 pF, DE at 3 V, See Figure 9 6
Propagation delay time, standby-to-high-level output tPZH 6 μs CL = 15 pF, DE at 0, See Figure 10 6
Propagation delay time, standby-to-low-level output tPZL 6 μs CL = 15 pF, DE at 0, See Figure 10 6

CAD (KiCad official)

  • Symbol: SN65HVD11EIM
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: sn65hvd11eim-etched.step / sn65hvd11eim-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn65hvd11eim.step / sn65hvd11eim.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HGSEMI datasheet (18 pp, sha256 dda19738278d49cb, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF