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SN65HVD07DR
Public Made by Adomby adom
Texas Instruments RS-485 / RS-422 ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SN65HVD07DR
Texas Instruments · RS-485 / RS-422 ICs · SOIC-8
SN65HVD07DR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | R | output | Receiver data output, driven from the differential receiver inputs A and B as shown in the logic diagram. |
| 2 | RE | input | Receiver enable, active-low, so the receiver is enabled when this pin is held low (the datasheet states the receiver enables are active-low). |
| 3 | DE | input | Driver enable, active-high, so the driver is enabled when this pin is held high (the datasheet states the driver enables are active-high). |
| 4 | D | input | Driver data input that drives the differential A and B bus outputs when the driver is enabled, per the logic diagram. |
| 5 | GND | power_in | Ground reference pin for the device; no voltage limits for this pin are given in the pages provided. |
| 6 | A | bidirectional | Non-inverting bus pin of the differential I/O port, shared by the driver output and receiver input. |
| 7 | B | bidirectional | Inverting bus pin of the differential I/O port, shared by the driver output and receiver input, designed to offer minimum bus loading when the driver is disabled or unpowered. |
| 8 | VCC | power_in | Positive supply pin; the recommended supply voltage range is not stated in the pages provided. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Interface |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
SN65HVD07DR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
sn65hvd07dr-etched.step/sn65hvd07dr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn65hvd07dr.step/sn65hvd07dr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (29 pp, sha256
52c3ae6cd944d9af, retrieved 2026-10-10, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SN65HVD07DR
**Texas Instruments** · RS-485 / RS-422 ICs · SOIC-8
SN65HVD07DR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | R | output | Receiver data output, driven from the differential receiver inputs A and B as shown in the logic diagram. |
| 2 | RE | input | Receiver enable, active-low, so the receiver is enabled when this pin is held low (the datasheet states the receiver enables are active-low). |
| 3 | DE | input | Driver enable, active-high, so the driver is enabled when this pin is held high (the datasheet states the driver enables are active-high). |
| 4 | D | input | Driver data input that drives the differential A and B bus outputs when the driver is enabled, per the logic diagram. |
| 5 | GND | power_in | Ground reference pin for the device; no voltage limits for this pin are given in the pages provided. |
| 6 | A | bidirectional | Non-inverting bus pin of the differential I/O port, shared by the driver output and receiver input. |
| 7 | B | bidirectional | Inverting bus pin of the differential I/O port, shared by the driver output and receiver input, designed to offer minimum bus loading when the driver is disabled or unpowered. |
| 8 | VCC | power_in | Positive supply pin; the recommended supply voltage range is not stated in the pages provided. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Interface |
| Pins | 8 |
## CAD (KiCad official)
- Symbol: `SN65HVD07DR`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `sn65hvd07dr-etched.step` / `sn65hvd07dr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn65hvd07dr.step` / `sn65hvd07dr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn65hvd07.pdf) (29 pp, sha256 `52c3ae6cd944d9af`, retrieved 2026-10-10, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sn65hvd07dr-datasheet.pdf)