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SN65HVD06EIM

Public Made by Adom

by adom

HGSEMI RS-485 / RS-422 ICs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SN65HVD06EIM

HGSEMI · RS-485 / RS-422 ICs · SOP-8

SN65HVD06EIM from HGSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 R tri_state Receiver output that goes high when VID is at or above -0.01 V, low when VID is at or below -0.2 V, and high-impedance when RE is high, with output current limited to -11 mA to 11 mA absolute maximum (recommended IOH -8 mA, IOL 8 mA).
2 RE input Active-low receiver enable whose high level (2 V minimum) puts R into high impedance, with a 0.8 V maximum low-level input.
3 DE input Active-high driver enable that must be high (2 V minimum) to drive A and B, with a 0.8 V maximum low-level input, and driver outputs go high-impedance when DE is low.
4 D input Driver data input, with 2 V minimum high-level and 0.8 V maximum low-level thresholds, and input voltage limited to -0.5 V to VCC + 0.5 V.
5 GND power_in Network ground terminal to which all voltages except the differential bus voltages are referenced.
6 A bidirectional Non-inverting differential bus terminal (driver output and receiver input) rated -9 V to 14 V absolute maximum, with a -7 V to 12 V bus common-mode range and 16 kV HBM ESD protection.
7 B bidirectional Inverting differential bus terminal (driver output and receiver input) rated -9 V to 14 V absolute maximum, with a -7 V to 12 V bus common-mode range and 16 kV HBM ESD protection.
8 VCC power_in Supply voltage with a recommended range of 4.5 V to 5.5 V and an absolute maximum range of -0.3 V to 6 V.

Key specifications

Parameter Value
Manufacturer HGSEMI
Package SOP-8
Category Interface
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage range, VCC VCC -0.3 6 V 2
Voltage range at A or B -9 14 V 2
Input voltage range at D, DE, R or RE -0.5 V Upper limit printed as VCC + 0.5 V 2
Voltage input range, transient pulse, A and B -50 50 V Through 100 Ω (see Figure 11) 2
Receiver output current IO -11 11 mA 2
Electrostatic discharge, human body model, A, B and GND 16 kV Human body model, JEDEC 22 A114-A 2
Electrostatic discharge, human body model, all pins 4 kV Human body model, JEDEC 22 A114-A 2
Electrostatic discharge, charged-device model, all pins 1 kV Charged-device model, JEDEC 22 C101 2
Supply voltage, VCC VCC 4.5 5.5 V 3
Voltage at any bus terminal VI or VIC -7 12 V Separately or common mode 3
High-level input voltage D, DE, RE VIH 2 V 3
Low-level input voltage D, DE, RE VIL 0.8 V 3
Differential input voltage VID -12 12 V See Figure 7 3
Driver high-level output current IOH -100 mA Driver 3
Receiver high-level output current IOH -8 mA Receiver 3
Driver low-level output current IOL 100 mA Driver 3
Receiver low-level output current IOL 8 mA Receiver 3
Operating free-air temperature TA -40 85 °C SN65HVD06 (E grade) 3
Input clamp voltage VIK -1.5 V II = -18 mA 3
Differential output voltage /VOD/ 2.5 V RL = 54 Ω, See Figure 4 3
Differential output voltage with common-mode loading /VOD/ 2.2 V Vtest = -7 V to 12 V, See Figure 2 3
Change in magnitude of differential output voltage Δ/VOD/ -0.2 0.2 V See Figure 4 and Figure 2 3
Steady-state common-mode output voltage VOC(SS) 2.2 3.3 V 3
Change in steady-state common-mode output voltage ΔVOC(SS) -0.1 0.1 V See Figure 3 3
Peak-to-peak common-mode output voltage (HVD06) VOC(PP) 500 mV See Figure 3 3
Short-circuit output current IOS -250 250 mA -7 V ≤ VO ≤ 12 V 3
Input current, D II -100 0 µA 3
Input current, DE II 0 100 µA 3
Supply current, receiver disabled, driver enabled ICC 9 15 mA RE at VCC, receiver disabled; D & DE at VCC, driver enabled; no load 3
Supply current, standby ICC 1 5 µA RE at VCC, receiver disabled; D at VCC, DE at 0 V, driver disabled; no load (standby) 3
Supply current, receiver enabled, driver enabled ICC 9 15 mA RE at 0 V, receiver enabled; D & DE at VCC, driver enabled; no load 3
Propagation delay time, low-to-high-level output (HVD06) tPLH 27 40 ns 4
Propagation delay time, high-to-low-level output (HVD06) tPHL 27 40 ns 4
Differential output signal rise time (HVD06) tr 18 28 55 ns RL = 54 Ω, CL = 50 pF, See Figure 4 4
Differential output signal fall time (HVD06) tf 18 28 55 ns RL = 54 Ω, CL = 50 pF, See Figure 4 4
Pulse skew (/tPHL - tPLH/) (HVD06) tsk(p) 2.5 ns 4
Part-to-part skew (HVD06) tsk(pp) 14 ns 4
Propagation delay time, high-impedance-to-high-level output (HVD06) tPZH1 45 ns RE at 0 V, RL = 110 Ω, See Figure 5 4
Propagation delay time, high-level-to-high-impedance output (HVD06) tPHZ 60 ns RE at 0 V, RL = 110 Ω, See Figure 5 4
Propagation delay time, high-impedance-to-low-level output (HVD06) tPZL1 45 ns RE at 0 V, RL = 110 Ω, See Figure 6 4
Propagation delay time, low-level-to-high-impedance output (HVD06) tPLZ 90 ns RE at 0 V, RL = 110 Ω, See Figure 6 4
Propagation delay time, standby-to-high-level output tPZH2 6 µs RL = 110 Ω, RE at 3 V, See Figure 5 4
Propagation delay time, standby-to-low-level output tPZL2 6 µs RL = 110 Ω, RE at 3 V, See Figure 6 4
Positive-going input threshold voltage VIT+ 0.01 V IO = -8 mA 5
Negative-going input threshold voltage VIT- -0.2 V IO = 8 mA 5
Enable-input clamp voltage VIK -1.5 V II = -18 mA 5
High-level output voltage VOH 4 V VID = 200 mV, IOH = -8 mA, See Figure 7 5
Low-level output voltage VOL 0.4 V VID = -200 mV, IOL = 8 mA, See Figure 7 5
High-impedance-state output current IOZ -1 1 µA VO = 0 or VCC, RE at VCC 5
Bus input current, HVD06 II 0.06 0.1 mA VA or VB = 12 V; other input at 0 V 5
Bus input current, HVD06, VCC = 0 V II 0.08 0.13 mA VA or VB = 12 V, VCC = 0 V; other input at 0 V 5
High-level input current, RE IIH -60 26.4 µA VIH = 2 V 5
Low-level input current, RE IIL -60 27.4 µA VIL = 0.8 V 5
Supply current, receiver enabled, driver disabled ICC 5 10 mA RE at 0 V, D & DE at 0 V; no load 5
Supply current, standby (receiver and driver disabled) ICC 1 5 µA RE at VCC, DE at 0 V, D at VCC; no load (standby) 5
Propagation delay time, low-to-high-level output, 1/8 UL (HVD06) tPLH 55 70 ns 1/8 UL 6
Propagation delay time, high-to-low-level output, 1/8 UL (HVD06) tPHL 55 70 ns 1/8 UL; VID = -1.5 V to 1.5 V, CL = 15 pF, See Figure 8 6
Pulse skew (/tPHL - tPLH/) (HVD06) tsk(p) 4.5 ns 6
Part-to-part skew (HVD06) tsk(pp) 14 ns 6
Output signal rise time tr 2 3 ns CL = 15 pF, See Figure 8 6
Output signal fall time tf 2 3 ns CL = 15 pF, See Figure 8 6
Output enable time to high level tPZH1 10 ns CL = 15 pF, DE at 3 V 6
Output enable time to low level tPZL1 10 ns CL = 15 pF, DE at 3 V 6
Output disable time from high level tPHZ 9 ns CL = 15 pF, DE at 3 V, See Figure 15 (as printed) 6
Output disable time from low level tPLZ 15 ns CL = 15 pF, DE at 3 V, See Figure 15 (as printed) 6
Propagation delay time, standby-to-high-level output tPZH2 6 µs CL = 15 pF, DE at 0, See Figure 10 6
Propagation delay time, standby-to-low-level output tPZL2 6 µs CL = 15 pF, DE at 0, See Figure 10 6
Power rating, package D, low-K board 710 mW TA ≤ 25°C; EIA/JESD51-3 Low-K 2
Derating factor above TA = 25°C, package D, low-K board 5.7 mW/°C Inverse of junction-to-ambient thermal resistance, board-mounted, no air flow 2
Power rating, package D, high-K board 1282 mW TA ≤ 25°C; EIA/JESD51-7 High-K 2
Derating factor above TA = 25°C, package D, high-K board 10.3 mW/°C Inverse of junction-to-ambient thermal resistance, board-mounted, no air flow 2

CAD (KiCad official)

  • Symbol: SN65HVD06EIM
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: sn65hvd06eim-etched.step / sn65hvd06eim-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn65hvd06eim.step / sn65hvd06eim.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HGSEMI datasheet (19 pp, sha256 315036adf5e24adb, retrieved 2026-10-20, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF