component

SN65C3222EPWR

Public Made by Adom

by adom

Texas Instruments Pre-ordered Chips, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentinterface icssn65c3222epwrfactory-2.0.0extractor-text

Verified SN65C3222EPWR

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 20 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: SN65C3222EPWR · TSSOP-20 · 20 pins
  • ✓copper: 20 copper pads, none touching another net
  • ✓datasheet: all 20 pin names found in the 27-page datasheet
  • ✓distributor: lcsc C2671731, digikey 296-20995-2-ND, mouser 595-SN65C3222EPWR
  • ✓family: TSSOP-20_4.4x6.5mm_P0.65mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-q258hv4u/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.18)
  • ✓pads: 20 pins = 20 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 20 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ sn65c3222epwr.kicad_sym✓ sn65c3222epwr.kicad_mod✓ sn65c3222epwr.step
Spot something wrong? Report it as an issue Propose a fix Records are signed by members of adom.
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 10d ago
viewers sn65c3222epwr: viewers · Ray 10d ago
package.json Publish 0.1.0 · Ray 10d ago
page.json Set visibility: public · Ray 10d ago
README.md Publish 0.1.0 · Ray 10d ago
sn65c3222epwr-etched.glb Publish 0.1.0 · Ray 10d ago
sn65c3222epwr-etched.step sn65c3222epwr: factory component page (tier=mfr) · Ray 10d ago
sn65c3222epwr-hero.glb sn65c3222epwr: hero GLB from the etched model (keeps the MPN mark) · Ray 10d ago
sn65c3222epwr-hero.overlay.json Publish 0.1.0 · Ray 10d ago
sn65c3222epwr.glb Publish 0.1.0 · Ray 10d ago
sn65c3222epwr.kicad_mod Publish 0.1.0 · Ray 10d ago
sn65c3222epwr.kicad_sym Publish 0.1.0 · Ray 10d ago
sn65c3222epwr.lbr Publish 0.1.0 · Ray 10d ago
sn65c3222epwr.step Publish 0.1.0 · Ray 10d ago
verification.json Verified: Published by the parts factory: tier mfr, 20 pins · Ray 10d ago

SN65C3222EPWR

Texas Instruments · Pre-ordered Chips · TSSOP-20

SN65C3222EPWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 EN input Receiver enable, active low; when EN is held high the receiver outputs ROUT go to high impedance (Z).
2 C1+ passive Charge pump capacitor pin for the C1 flying-capacitor connection.
3 V+ power_in Charge pump capacitor pin for the positive-output supply node V+, which is lowered to VCC when the device is powered down.
4 C1- passive Charge pump capacitor pin for the C1 flying-capacitor connection.
5 C2+ passive Charge pump capacitor pin for the C2 flying-capacitor connection.
6 C2- passive Charge pump capacitor pin for the C2 flying-capacitor connection.
7 V- power_in Charge pump capacitor pin for the negative-output supply node V-, which is raised toward GND when the device is powered down.
8 DOUT2 output RS-232 driver output; placed in high impedance when PWRDOWN is low, with output voltage limited to ±13.2 V (absolute maximum).
9 RIN2 input RS-232 receiver input; input voltage range ±25 V with input resistance of 3 kΩ to 7 kΩ.
10 ROUT2 output Receiver logic output; goes to high impedance when EN is high.
11 NC unconnected No internal connection.
12 DIN2 input Driver logic input; input voltage range is 0 V to 5.5 V, allowing 5-V logic with a 3.3-V supply.
13 DIN1 input Driver logic input; input voltage range is 0 V to 5.5 V, allowing 5-V logic with a 3.3-V supply.
14 NC unconnected No internal connection.
15 ROUT1 output Receiver logic output; goes to high impedance when EN is high.
16 RIN1 input RS-232 receiver input; input voltage range ±25 V with input resistance of 3 kΩ to 7 kΩ.
17 DOUT1 output RS-232 driver output; placed in high impedance when PWRDOWN is low, with output voltage limited to ±13.2 V (absolute maximum).
18 GND power_in Ground; all device voltages are referenced to network GND.
19 VCC power_in Positive supply; recommended operating range 3 V to 5.5 V with an absolute maximum of 6 V.
20 PWRDOWN input Driver disable, active low; when low the drivers go to high impedance, the charge pump is disabled, and the supply draws about 1 µA.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-20
Category Interface ICs
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage, VCC = 3.3 V VCC 3 3.3 3.6 V VCC = 3.3 V 5
Supply voltage, VCC = 5 V VCC 4.5 5 5.5 V VCC = 5 V 5
Driver and control high-level input voltage (DIN, EN, PWRDOWN) VIH 2 V VCC = 3.3 V 5
Driver and control high-level input voltage (DIN, EN, PWRDOWN) VIH 2.4 V VCC = 5 V 5
Driver and control low-level input voltage (DIN, EN, PWRDOWN) VIL 0.8 V 5
Driver and control input voltage (DIN, EN, PWRDOWN) VI 0 5.5 V 5
Receiver input voltage VI -25 25 V 5
Operating free-air temperature TA -40 85 °C SN65C3222E 5
Supply voltage range VCC -0.3 6 V 4
Positive-output supply voltage range V+ -0.3 7 V 4
Negative-output supply voltage range V- -7 0.3 V 4
Supply voltage difference V+, V- 13 V 4
Input voltage range, driver (EN, PWRDOWN) VI -0.3 6 V 4
Input voltage range, receiver VI -25 25 V 4
Output voltage range, driver VO -13.2 13.2 V 4
Operating virtual junction temperature TJ 150 °C 4
Storage temperature range Tstg -65 150 °C 4
Input leakage current (EN, PWRDOWN) II -1 0.01 1 μA 5
Supply current ICC 0.3 1 mA No load, PWRDOWN at VCC 5
Supply current (powered off) ICC 1 10 μA No load, PWRDOWN at GND 5
High-level output voltage VOH 5 5.4 V DOUT at RL = 3 kΩ to GND, DIN = GND 6
Low-level output voltage VOL -5 -5.4 V DOUT at RL = 3 kΩ to GND, DIN = VCC 6
High-level input current IIH -1 0.01 1 μA VI = VCC 6
Low-level input current IIL -1 0.01 1 μA VI at GND 6
Short-circuit output current IOS -60 35 60 mA VCC = 3.6 V, VO = 0 V 6
Output resistance ro 300 Ω VCC, V+, and V- = 0 V, VO = ±2 V 6
Output leakage current IOZ -25 25 μA PWRDOWN = GND, VCC = 3 V to 3.6 V, VO = ±12 V 6
Low-level output voltage VOL 0.4 V IOL = 1.6 mA 7
Positive-going input threshold voltage VIT+ 1.5 2.4 V VCC = 3.3 V 7
Positive-going input threshold voltage VIT+ 1.8 2.4 V VCC = 5 V 7
Negative-going input threshold voltage VIT- 0.6 1.2 V VCC = 3.3 V 7
Negative-going input threshold voltage VIT- 0.8 1.5 V VCC = 5 V 7
Input hysteresis (VIT+, VIT-) Vhys 0.3 V 7
Output leakage current IOZ -10 0.05 10 μA EN = 1 7
Input resistance ri 3 5 7 kΩ VI = ±3 V to ±25 V 7
Maximum data rate 250 kbit/s RL = 3 kΩ, One DOUT switching, CL = 1000 pF 6
Maximum data rate 1000 kbit/s CL = 250 pF, VCC = 3 V to 4.5 V 6
Pulse skew tsk(p) 300 ns CL = 150 pF to 2500 pF, RL = 3 kΩ to 7 kΩ 6
Slew rate, transition region SR(tr) 8 90 V/μs RL = 7 kΩ, CL = 150 pF to 1000 pF 6
Slew rate, transition region SR(tr) 12 60 V/μs RL = 3 kΩ, CL = 1000 pF 6
Slew rate, transition region SR(tr) 24 150 V/μs RL = 3 kΩ, CL = 150 pF to 250 pF 6
Junction-to-ambient thermal resistance (PW, TSSOP-20) RθJA 94.1 °C/W SN65C3222E, PW (TSSOP) 20 pins 5
Junction-to-case (bottom) thermal resistance (PW, TSSOP-20) RθJC(top) 35.2 °C/W SN65C3222E, PW (TSSOP) 20 pins 5
Junction-to-board thermal resistance (PW, TSSOP-20) RθJB 45.5 °C/W SN65C3222E, PW (TSSOP) 20 pins 5
Junction-to-top characterization parameter (PW, TSSOP-20) ψJT 3.1 °C/W SN65C3222E, PW (TSSOP) 20 pins 5
Junction-to-board characterization parameter (PW, TSSOP-20) ψJB 45.1 °C/W SN65C3222E, PW (TSSOP) 20 pins 5

CAD (KiCad official)

  • Symbol: SN65C3222EPWR
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: sn65c3222epwr-etched.step / sn65c3222epwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn65c3222epwr.step / sn65c3222epwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (27 pp, sha256 6c8b65f4984be376, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF