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SN6505DQDBVTQ1
Public Made by Adomby adom
Texas Instruments Power Management - Specialized, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SN6505DQDBVTQ1
Texas Instruments · Power Management - Specialized · SOT-23-6
SN6505DQDBVTQ1 from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | D1 | output | Open-drain output of the first power MOSFETs, typically connected to the outer terminals of the center-tap transformer, and its external trace should be kept short because large currents flow through it. |
| 2 | VCC | power_in | Device supply pin that should be bypassed with a 4.7 µF or greater, low-ESR capacitor, and an internal undervoltage lockout turns both outputs off when VCC ≤ 2.25 V. |
| 3 | D2 | output | Open-drain output of the second power MOSFETs, typically connected to the outer terminals of the center-tap transformer, and its external trace should be kept short because large currents flow through it. |
| 4 | GND | power_in | Ground connected to the power MOSFET switch sources through an internal sense circuit, which must be tied to a low-inductance quality ground plane because large currents flow through it. |
| 5 | EN | input | Enable pin that turns the device on or off, where grounding or leaving it floating disables all internal circuitry, and if unused it should be tied directly to VCC. |
| 6 | CLK | input | External clock input, internally pulled down to GND, where the device automatically shifts to the internal clock if a valid clock is not detected on this pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |
CAD (KiCad official)
- Symbol:
SN6505DQDBVTQ1 - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
sn6505dqdbvtq1-etched.step/sn6505dqdbvtq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn6505dqdbvtq1.step/sn6505dqdbvtq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (40 pp, sha256
6880eb829d5359e3, retrieved 2026-10-11, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SN6505DQDBVTQ1
**Texas Instruments** · Power Management - Specialized · SOT-23-6
SN6505DQDBVTQ1 from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | D1 | output | Open-drain output of the first power MOSFETs, typically connected to the outer terminals of the center-tap transformer, and its external trace should be kept short because large currents flow through it. |
| 2 | VCC | power_in | Device supply pin that should be bypassed with a 4.7 µF or greater, low-ESR capacitor, and an internal undervoltage lockout turns both outputs off when VCC ≤ 2.25 V. |
| 3 | D2 | output | Open-drain output of the second power MOSFETs, typically connected to the outer terminals of the center-tap transformer, and its external trace should be kept short because large currents flow through it. |
| 4 | GND | power_in | Ground connected to the power MOSFET switch sources through an internal sense circuit, which must be tied to a low-inductance quality ground plane because large currents flow through it. |
| 5 | EN | input | Enable pin that turns the device on or off, where grounding or leaving it floating disables all internal circuitry, and if unused it should be tied directly to VCC. |
| 6 | CLK | input | External clock input, internally pulled down to GND, where the device automatically shifts to the internal clock if a valid clock is not detected on this pin. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |
## CAD (KiCad official)
- Symbol: `SN6505DQDBVTQ1`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files: `sn6505dqdbvtq1-etched.step` / `sn6505dqdbvtq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn6505dqdbvtq1.step` / `sn6505dqdbvtq1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn6505b-q1) (40 pp, sha256 `6880eb829d5359e3`, retrieved 2026-10-11, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sn6505dqdbvtq1-datasheet.pdf)