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SN6505BQDBVTQ1

Public Made by Adom

by adom

Texas Instruments Power Management - Specialized, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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docs sn6505bqdbvtq1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
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README.md Initial commit: component/sn6505bqdbvtq1 · Ray 4d ago
sn6505bqdbvtq1-etched.fit.json sn6505bqdbvtq1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
sn6505bqdbvtq1-etched.glb sn6505bqdbvtq1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
sn6505bqdbvtq1-etched.step sn6505bqdbvtq1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
sn6505bqdbvtq1.glb Publish 0.1.0 · Ray 4d ago
sn6505bqdbvtq1.kicad_mod Publish 0.1.0 · Ray 4d ago
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sn6505bqdbvtq1.step Publish 0.1.0 · Ray 4d ago

SN6505BQDBVTQ1

Texas Instruments · Power Management - Specialized · SOT-23-6

SN6505BQDBVTQ1 from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 D1 tri_state Open drain output of the first power MOSFET stage for connection to center-tap transformer secondary; external traces must be kept short due to large current flow.
2 VCC power_in Device supply pin that must be bypassed with 4.7 μF or greater low ESR capacitor; internal UVLO circuit disables outputs when VCC ≤ 2.25 V.
3 D2 tri_state Open drain output of the second power MOSFET stage for connection to center-tap transformer secondary; external traces must be kept short due to large current flow.
4 GND power_in Ground connected to power MOSFET switch sources via internal sense circuit; must be connected to low-inductance quality ground plane due to large current flow.
5 EN input Active-high enable input that turns the device on or off; floating or grounded disables all internal circuitry; tie to VCC if unused.
6 CLK input External clock input with internal pull-down to GND; device automatically switches to internal clock if valid external clock is not detected.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-6
Category Power Management (PMIC)
Pins 6

CAD (KiCad official)

  • Symbol: SN6505BQDBVTQ1
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: sn6505bqdbvtq1-etched.step / sn6505bqdbvtq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn6505bqdbvtq1.step / sn6505bqdbvtq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (40 pp, sha256 6880eb829d5359e3, retrieved 2026-10-01, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF