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Initial commit: component/sn6505bqdbvtq1

Ray ·71ea304fd1 ·4d ago
2 files changed +185
README.mdadded+43
@@ -0,0 +1,43 @@+# SN6505BQDBVTQ1++**Texas Instruments** · Power Management - Specialized · SOT-23-6++SN6505BQDBVTQ1 from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | D1 | tri_state | Open drain output of the first power MOSFET stage for connection to center-tap transformer secondary; external traces must be kept short due to large current flow. |+| 2 | VCC | power_in | Device supply pin that must be bypassed with 4.7 μF or greater low ESR capacitor; internal UVLO circuit disables outputs when VCC ≤ 2.25 V. |+| 3 | D2 | tri_state | Open drain output of the second power MOSFET stage for connection to center-tap transformer secondary; external traces must be kept short due to large current flow. |+| 4 | GND | power_in | Ground connected to power MOSFET switch sources via internal sense circuit; must be connected to low-inductance quality ground plane due to large current flow. |+| 5 | EN | input | Active-high enable input that turns the device on or off; floating or grounded disables all internal circuitry; tie to VCC if unused. |+| 6 | CLK | input | External clock input with internal pull-down to GND; device automatically switches to internal clock if valid external clock is not detected. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOT-23-6 |+| Category | Power Management (PMIC) |+| Pins | 6 |++## CAD (KiCad official)++- Symbol: `SN6505BQDBVTQ1`+- Footprint: `Package_TO_SOT_SMD:SOT-23-6`+- 3D model: SOT-23-6 (KiCad packages3D, STEP)+- 3D model files: `sn6505bqdbvtq1-etched.step` / `sn6505bqdbvtq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn6505bqdbvtq1.step` / `sn6505bqdbvtq1.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn6505b-q1) (40 pp, sha256 `6880eb829d5359e3`, retrieved 2026-10-01, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn6505bqdbvtq1-datasheet.pdf)
page.jsonadded+142
@@ -0,0 +1,142 @@+{+  "slug": "sn6505bqdbvtq1",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Power Management - Specialized, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "power management (pmic)",+    "sn6505bqdbvtq1",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "sn6505bqdbvtq1.kicad_sym",+    "sn6505bqdbvtq1.kicad_mod",+    "sn6505bqdbvtq1.glb",+    "sn6505bqdbvtq1.step",+    "sn6505bqdbvtq1.lbr",+    "docs/hero.png",+    "docs/sn6505bqdbvtq1-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "SN6505BQDBVTQ1",+    "manufacturer": "Texas Instruments",+    "package": "SOT-23-6",+    "pin_count": 6,+    "category": "Power Management (PMIC)",+    "subcategory": "Power Management - Specialized",+    "datasheet": "https://www.ti.com/cn/lit/gpn/sn6505b-q1",+    "parts": {+      "symbol": "sn6505bqdbvtq1.kicad_sym",+      "footprint": "sn6505bqdbvtq1.kicad_mod",+      "model_3d": "sn6505bqdbvtq1-etched.glb",+      "model_3d_plain": "sn6505bqdbvtq1.glb",+      "model_3d_step": "sn6505bqdbvtq1-etched.step",+      "model_3d_step_plain": "sn6505bqdbvtq1.step",+      "lbr": "sn6505bqdbvtq1.lbr"+    },+    "distributor_links": {+      "lcsc": "C2155974",+      "digikey": "296-SN6505BQDBVTQ1TR-ND"+    },+    "distributor_check": {+      "checked_at": "2026-10-01T09:01:33Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-SN6505BQDBVTQ1TR-ND",+        "status": "found"+      },+      "mouser": {+        "pn": null,+        "status": "error"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "D1",+        "type": "tri_state",+        "description": "Open drain output of the first power MOSFET stage for connection to center-tap transformer secondary; external traces must be kept short due to large current flow."+      },+      {+        "number": "2",+        "name": "VCC",+        "type": "power_in",+        "description": "Device supply pin that must be bypassed with 4.7 μF or greater low ESR capacitor; internal UVLO circuit disables outputs when VCC ≤ 2.25 V."+      },+      {+        "number": "3",+        "name": "D2",+        "type": "tri_state",+        "description": "Open drain output of the second power MOSFET stage for connection to center-tap transformer secondary; external traces must be kept short due to large current flow."+      },+      {+        "number": "4",+        "name": "GND",+        "type": "power_in",+        "description": "Ground connected to power MOSFET switch sources via internal sense circuit; must be connected to low-inductance quality ground plane due to large current flow."+      },+      {+        "number": "5",+        "name": "EN",+        "type": "input",+        "description": "Active-high enable input that turns the device on or off; floating or grounded disables all internal circuitry; tie to VCC if unused."+      },+      {+        "number": "6",+        "name": "CLK",+        "type": "input",+        "description": "External clock input with internal pull-down to GND; device automatically switches to internal clock if valid external clock is not detected."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [],+        "pages_sent": 7,+        "cost_usd": 0.0656,+        "at": "2026-10-01T09:01:17"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/sn6505b-q1",+        "pages": 40,+        "sha256": "6880eb829d5359e3",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 6,+        "described": 6,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file