main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 1d ago
viewers sn6505adbvt: viewers · Ray 1d ago
package.json sn6505adbvt: LCSC part number C2650143 (was published as the bare integer) · Ray 7h ago
page.json sn6505adbvt: LCSC part number C2650143 (was published as the bare integer) · Ray 7h ago
README.md Initial commit: component/sn6505adbvt · Ray 1d ago
sn6505adbvt-etched.glb sn6505adbvt: factory component page (tier=mfr) · Ray 1d ago
sn6505adbvt-etched.step sn6505adbvt: factory component page (tier=mfr) · Ray 1d ago
sn6505adbvt-hero.glb Publish 0.1.0 · Ray 1d ago
sn6505adbvt-hero.overlay.json Publish 0.1.0 · Ray 1d ago
sn6505adbvt.glb Publish 0.1.0 · Ray 1d ago
sn6505adbvt.kicad_mod Publish 0.1.0 · Ray 1d ago
sn6505adbvt.kicad_sym Publish 0.1.0 · Ray 1d ago
sn6505adbvt.lbr Publish 0.1.0 · Ray 1d ago
sn6505adbvt.step Publish 0.1.0 · Ray 1d ago

SN6505ADBVT

Texas Instruments · Power Management - Specialized · SOT-23-6

SN6505ADBVT from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 D1 tri_state Open drain output of the first power MOSFETs, typically connected to the outer terminals of the center tap transformer with external traces kept short due to large current flow.
2 VCC power_in Device supply pin requiring 4.7 μF or greater low ESR bypass capacitor; internal undervoltage lockout trips when VCC ≤ 2.25 V.
3 D2 tri_state Open drain output of the second power MOSFETs, typically connected to the outer terminals of the center tap transformer with external traces kept short due to large current flow.
4 GND power_in Ground connected to the source of power MOSFET switches via internal sense circuit; must be connected to low-inductance quality ground plane due to large current flow.
5 EN input Enable pin that turns device on or off; grounding or leaving floating disables all internal circuitry and should be tied directly to VCC if unused.
6 CLK input External clock input pin, internally pulled down to GND; device automatically shifts to internal clock if valid clock is not detected.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-6
Category Power Management (PMIC)
Pins 6

CAD (KiCad official)

  • Symbol: SN6505ADBVT
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: sn6505adbvt-etched.step / sn6505adbvt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn6505adbvt.step / sn6505adbvt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (43 pp, sha256 dfc57cb042218cb6, retrieved 2026-10-06, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF