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docs sm8102abc: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json sm8102abc: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md sm8102abc: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray
sm8102abc-etched.fit.json sm8102abc: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
sm8102abc-etched.glb sm8102abc: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
sm8102abc-etched.step sm8102abc: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
sm8102abc.glb Publish 0.1.0 · Ray
sm8102abc.kicad_mod Publish 0.1.0 · Ray
sm8102abc.kicad_sym Publish 0.1.0 · Ray
sm8102abc.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
sm8102abc.step Publish 0.1.0 · Ray

SM8102ABC

Silergy Corp · DC-DC Converters · SOT-23-6

SM8102ABC from Silergy Corp, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BS passive Boot-strap pin. Supplies the high-side gate driver. Connect a 0.1µF (100nF) ceramic capacitor between BS and LX. BS-LX voltage rated -0.3V to 4V.
2 GND power_in Power ground pin. Return for input decoupling and internal low-side MOSFET.
3 FB input Output feedback pin. Connect to the center point of the external output resistor divider to program the output voltage: VOUT = 0.6 × (1 + RH/RL). Internal reference VREF = 600mV (588-612mV). FB input current ±50nA max.
4 EN input Enable control input. Pull high to turn the converter on; do not leave floating. Rising threshold typ 1.2V (1.08-1.32V), falling threshold typ 1.0V (0.9-1.1V). Rated -0.3V to VIN+0.3V.
5 IN power_in Input supply pin. 4.2V to 18V operating range (abs max 19V). Decouple to GND with at least a 10µF ceramic capacitor.
6 LX power_out Switching node / inductor pin. Connect to the external power inductor. Also forms the low reference for the bootstrap capacitor. Rated -0.3V to VIN+0.3V (dynamic IN+3V to GND-5V for 10ns).

Key specifications

Parameter Value
Manufacturer Silergy Corp
Package SOT-23-6
Category PMIC
Pins 6

Ordering variants

Same part, different packaging or reel option.

  • SM8102ABC

CAD (KiCad official)

  • Symbol: SM8102ABC
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: sm8102abc-etched.step / sm8102abc-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sm8102abc.step / sm8102abc.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Silergy Corp datasheet (6 pp, sha256 d2227748bff1b546, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF