component
SM8082EAAC
Public Made by Adomby adom
Silergy Corp DC-DC Converters, SOT23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 9h ago |
| viewers | 9h ago |
| package.json | 9h ago |
| page.json | 9h ago |
| README.md | 9h ago |
| sm8082eaac-etched.glb | 9h ago |
| sm8082eaac-etched.step | 9h ago |
| sm8082eaac-hero.glb | 9h ago |
| sm8082eaac-hero.overlay.json | 9h ago |
| sm8082eaac.glb | 9h ago |
| sm8082eaac.kicad_mod | 9h ago |
| sm8082eaac.kicad_sym | 9h ago |
| sm8082eaac.lbr | 9h ago |
| sm8082eaac.step | 9h ago |
SM8082EAAC
Silergy Corp · DC-DC Converters · SOT23-5
SM8082EAAC from Silergy Corp, in a SOT23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | EN | input | Enable control: pull high to turn on and do not leave it floating. |
| 2 | GND | power_in | Ground pin. |
| 3 | LX | output | Inductor pin, connected to the switching node of the inductor. |
| 4 | IN | power_in | Input pin, decoupled to the GND pin with at least a 10µF ceramic capacitor. |
| 5 | FB | input | Output feedback pin, connected to the center point of the output resistor divider to program the output voltage VOUT=0.6×(1+RH/RL). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Silergy Corp |
| Package | SOT23-5 |
| Category | Power Supply Chip |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Input Voltage | VIN | 2.5 | 5.5 | V | 3 | ||
| Junction Temperature Range | -40 | 125 | °C | 3 | |||
| Ambient Temperature Range | -40 | 85 | °C | 3 | |||
| Supply Input Voltage | -0.3 | 6 | V | 3 | |||
| FB, EN Voltage | -0.3 | V | Upper limit printed as VIN+0.6V | 3 | |||
| LX Voltage | -0.3 | 6 | V | (*1) tested down to -3V <40ns; (*2) tested up to +7V <40ns | 3 | ||
| Junction Temperature Range | -40 | 150 | °C | 3 | |||
| Storage Temperature Range | -65 | 150 | °C | 3 | |||
| Lead Temperature | 260 | °C | Soldering, 10 sec. | 3 | |||
| Power Dissipation | PD | 0.83 | W | TA = 25°C | 3 | ||
| Package Thermal Resistance junction-to-ambient | θJA | 120 | °C/W | Note 2: natural convection, TA = 25°C, 2OZ two-layer board | 3 | ||
| Package Thermal Resistance junction-to-case | θJC | 20 | °C/W | Note 2: case position pin 3 | 3 | ||
| Input Voltage Range | VIN | 2.5 | 5.5 | V | 4 | ||
| Feedback Reference Voltage | VREF | 588 | 600 | 612 | mV | 4 | |
| Input UVLO Threshold | VUVLO | 2.5 | V | 4 | |||
| Input UVLO Hysteresis | VHYS | 150 | mV | 4 | |||
| Shutdown Current | ISHDN | 0.1 | 1 | µA | VEN=0V | 4 | |
| LX Node Discharge Resistance | RDIS | 50 | Ω | 4 | |||
| Top FET RON | RDS(ON)1 | 130 | mΩ | 4 | |||
| Bottom FET RON | RDS(ON)2 | 90 | mΩ | 4 | |||
| EN Input Voltage High | VEN,H | 1.2 | V | 4 | |||
| EN Input Voltage Low | VEN,L | 0.4 | V | 4 | |||
| Min ON Time | tON,MIN | 60 | ns | 4 | |||
| Maximum Duty Cycle | DMAX | 100 | % | 4 | |||
| Turn On Delay | tON,DLY | 0.5 | ms | from EN high to LX start switching | 4 | ||
| Soft-start Time | tSS | 1 | ms | VOUT from 0% to 100% | 4 | ||
| Switching Frequency | fSW | 1.5 | MHz | 4 | |||
| Top FET Current Limit | ILMT,TOP | 3.5 | A | 4 | |||
| Thermal Shutdown Temperature | TSD | 160 | °C | 4 | |||
| Thermal Shutdown Hysteresis | THYS | 20 | °C | 4 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | 3) The PCB copper area associated with LX pin | 8 |
CAD (KiCad official)
- Symbol:
SM8082EAAC - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT23-5 (KiCad packages3D, STEP)
- 3D model files:
sm8082eaac-etched.step/sm8082eaac-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sm8082eaac.step/sm8082eaac.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Silergy Corp datasheet (10 pp, sha256
56867b4e0a208f7f, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusoff(skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).