SM74HC595D

{
 "schema": "adom.pads/1",
 "slug": "sm74hc595d",
 "footprint": "SOIC-16_3.9x9.9mm_P1.27mm",
 "generated_from": {
  "footprint": "SOIC-16_3.9x9.9mm_P1.27mm@sha256:f9b5075740f7816c",
  "pins": "page.json:component.pins",
  "overrides": null
 },
 "pin1": {
  "pad": "1",
  "at": [
   -2.475,
   -4.445
  ],
  "corner": "top-left",
  "source": "silk-marker",
  "derived_from": "SOIC-16_3.9x9.9mm_P1.27mm@sha256:f9b5075740f7816c"
 },
 "pad_count": 16,
 "symbol_pins": [
  "1",
  "10",
  "11",
  "12",
  "13",
  "14",
  "15",
  "16",
  "2",
  "3",
  "4",
  "5",
  "6",
  "7",
  "8",
  "9"
 ],
 "paste_apertures": 0,
 "issues": [],
 "pads": [
  {
   "pad": "1",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -4.445
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "1",
   "name": "Q1",
   "type": "tri_state",
   "description": "Parallel latched output bit 1 from the storage register. Three-state; enabled when /G (pin 13) is low.",
   "is_pin1": true,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "2",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -3.175
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "2",
   "name": "Q2",
   "type": "tri_state",
   "description": "Parallel latched output bit 2. Three-state, enabled by /G low.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "3",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "3",
   "name": "Q3",
   "type": "tri_state",
   "description": "Parallel latched output bit 3. Three-state, enabled by /G low.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "4",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "4",
   "name": "Q4",
   "type": "tri_state",
   "description": "Parallel latched output bit 4. Three-state, enabled by /G low.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "5",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "5",
   "name": "Q5",
   "type": "tri_state",
   "description": "Parallel latched output bit 5. Three-state, enabled by /G low.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "6",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "6",
   "name": "Q6",
   "type": "tri_state",
   "description": "Parallel latched output bit 6. Three-state, enabled by /G low.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "7",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    3.175
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "7",
   "name": "Q7",
   "type": "tri_state",
   "description": "Parallel latched output bit 7 (MSB of the 8-bit output). Three-state, enabled by /G low.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "8",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    4.445
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "8",
   "name": "GND",
   "type": "power_in",
   "description": "Logic ground reference (0 V).",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "9",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    4.445
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "9",
   "name": "Q7'",
   "type": "output",
   "description": "Serial data output from the last stage of the shift register. Used to daisy-chain multiple 74HC595 devices; not three-state.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "10",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    3.175
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "10",
   "name": "/SCLR",
   "type": "input",
   "description": "Active-low asynchronous shift-register clear. Driving low forces all shift-register bits to 0 (Q7' = 0); does not affect the storage latch until an RCK edge.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "11",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "11",
   "name": "SCK",
   "type": "input",
   "description": "Shift-register clock. Data on SER is shifted into the shift register on the rising edge. Max 50 MHz (typ. 52 MHz at Vcc = 4.5 V).",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "12",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "12",
   "name": "RCK",
   "type": "input",
   "description": "Storage/latch register clock. On the rising edge, the shift-register contents are transferred to the output storage register (latched to Q0-Q7).",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "13",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "13",
   "name": "/G",
   "type": "input",
   "description": "Active-low output enable for the parallel outputs Q0-Q7. Low enables the latched data onto the outputs; high places Q0-Q7 in high-impedance (3-state).",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "14",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "14",
   "name": "SER",
   "type": "input",
   "description": "Serial data input to the shift register. Sampled on the rising edge of SCK; tSU ≈ 16 ns, tH ≈ 3 ns.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "15",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -3.175
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "15",
   "name": "Q0",
   "type": "tri_state",
   "description": "Parallel latched output bit 0 (LSB of the 8-bit output). Three-state, enabled by /G low.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "16",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -4.445
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "16",
   "name": "VCC",
   "type": "power_in",
   "description": "Positive supply voltage, 2.0 V to 6.0 V. Bypass with 100 nF near the pin.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  }
 ]
}