# SM7033P

**Shenzhen Sunmoon Micro** · Linear Voltage Regulators (LDO) · SOP-8

SM7033P from Shenzhen Sunmoon Micro, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DRAIN | passive | Drain of the internal high-voltage MOSFET, rated 500V breakdown (BV_DRAIN) and also charges the VDD capacitor through an internal JFET. |
| 2 | NC | unconnected | No connection, left floating. |
| 3 | FB | input | Chip feedback input with 2V constant-voltage threshold, absolute maximum -0.3V to 7V. |
| 4 | VDD | power_in | Chip power supply pin, typical operating voltage 6.0V, absolute maximum -0.3V to 7V. |
| 5 | NC | unconnected | No connection, left floating. |
| 6 | NC | unconnected | No connection, left floating. |
| 7 | GND | power_in | Chip ground; pins 7 and 8 should be connected to a copper pour larger than 8x8mm to lower chip temperature. |
| 8 | GND | power_in | Chip ground; pins 7 and 8 should be connected to a copper pour larger than 8x8mm to lower chip temperature. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Shenzhen Sunmoon Micro |
| Package | SOP-8 |
| Category | Power Management ICs |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DRAIN peak voltage (drain to source) | DRAIN | -0.3 |  | 500 | V | TA=25℃ | 3 |
| Supply voltage | VDD | -0.3 |  | 7 | V | TA=25℃ | 3 |
| FB input voltage | VFB | -0.3 |  | 7 | V | TA=25℃ | 3 |
| Operating junction temperature | TJ | -40 |  | 150 | ℃ | TA=25℃ | 3 |
| Storage temperature | TSTG | -55 |  | 150 | ℃ | TA=25℃ | 3 |
| HBM ESD | VESD | 2 |  |  | KV | HBM, printed as >2 | 3 |
| Junction-to-ambient thermal resistance | RθJA |  | 130 |  | ℃/W |  | 3 |
| VDD operating voltage | VDD |  | 6 |  | V | DRAIN=20V, TA=25℃ | 3 |
| Quiescent operating current | IDD |  | 400 |  | uA | VDD=6V FB=5V | 3 |
| FB constant-voltage threshold | VFB_CV |  | 2 |  | V | TA=25℃, VDD=6V | 3 |
| Operating frequency | FOSC |  | 40 |  | kHz | TA=25℃, VDD=6V | 3 |
| Leading edge blanking time | TLEB |  | 300 |  | nS | TA=25℃, VDD=6V | 3 |
| DRAIN breakdown voltage | BV_DRAIN |  | 500 |  | V | TA=25℃, VDD=6V | 3 |
| Internal MOSFET on-resistance | Rdson |  | 80 |  | Ohms | TA=25℃, VDD=6V | 3 |

## CAD (KiCad official)

- Symbol: `SM7033P`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `sm7033p-etched.step` / `sm7033p-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sm7033p.step` / `sm7033p.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Shenzhen Sunmoon Micro datasheet](docs/sm7033p-datasheet.pdf) (7 pp, sha256 `f7a3cacdb66a2944`, retrieved 2026-10-22, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/sm7033p-datasheet.pdf)