component
SM4803APRL-HXY
Public Made by Adomby adom
HXY MOSFET MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSM4803APRL-HXY
HXY MOSFET · MOSFETs · SOP-8
SM4803APRL-HXY from HXY MOSFET, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of the first P-channel MOSFET; the device is rated VDS = -30 V, VGS = ±20 V, continuous ID = -5.3 A and pulsed IDM = -20 A. |
| 2 | G1 | input | Gate of the first P-channel MOSFET, with gate-source voltage limited to ±20 V. |
| 3 | S2 | passive | Source of the second P-channel MOSFET; the device is rated VDS = -30 V, VGS = ±20 V, continuous ID = -5.3 A and pulsed IDM = -20 A. |
| 4 | G2 | input | Gate of the second P-channel MOSFET, with gate-source voltage limited to ±20 V. |
| 5 | D2 | passive | Drain of the second P-channel MOSFET; drain-source voltage is limited to -30 V. |
| 6 | D2 | passive | Drain of the second P-channel MOSFET (internally tied to pin 5); drain-source voltage is limited to -30 V. |
| 7 | D1 | passive | Drain of the first P-channel MOSFET (internally tied to pin 8); drain-source voltage is limited to -30 V. |
| 8 | D1 | passive | Drain of the first P-channel MOSFET; drain-source voltage is limited to -30 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HXY MOSFET |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | BVDSS | -30 | -33 | V | VGS=0V ID=-250μA | 2 | |
| Zero Gate Voltage Drain Current | IDSS | -1 | μA | VDS=-24V,VGS=0V | 2 | ||
| Gate-Body Leakage Current | IGSS | -100 | 100 | nA | VGS=±20V,VDS=0V | 2 | |
| Gate Threshold Voltage | VGS(th) | -1 | -1.6 | -3 | V | VDS=VGS,ID=-250μA | 2 |
| Drain-Source On-State Resistance | RDS(ON) | 35 | 42 | mR | VGS=-10V, ID=-5.3A | 2 | |
| Drain-Source On-State Resistance | RDS(ON) | 70 | 85 | mR | VGS=-4.5V, ID=-4.2A | 2 | |
| Forward Transconductance | gFS | 4 | 7 | S | VDS=-15V,ID=-4.5A | 2 | |
| Diode Forward Voltage | VSD | -1.2 | V | VGS=0V,IS=-5.3A | 2 | ||
| Drain-Source Voltage | VDS | -30 | V | 1 | |||
| Gate-Source Voltage | VGS | -20 | 20 | V | 1 | ||
| Drain Current-Continuous | ID | -5.3 | A | 1 | |||
| Drain Current-Pulsed | IDM | -20 | A | Note 1: repetitive rating, pulse width limited by maximum junction temperature | 1 | ||
| Maximum Power Dissipation | PD | 2.6 | W | 1 | |||
| Operating Junction and Storage Temperature Range | TJ,TSTG | -55 | 150 | ℃ | 1 | ||
| Thermal Resistance, Junction-to-Ambient | RθJA | 49 | ℃/W | Surface Mounted on FR4 Board, t ≤ 10 sec (Note 2) | 1 |
CAD (KiCad official)
- Symbol:
SM4803APRL-HXY - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
sm4803aprl-hxy-etched.step/sm4803aprl-hxy-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sm4803aprl-hxy.step/sm4803aprl-hxy.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HXY MOSFET datasheet (7 pp, sha256
b55a1f1b1f2a1f4e, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).