# SM4027PSU

**UMW** · MOSFETs · TO-252

SM4027PSU from UMW, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | GATE terminal of the -40 V P-channel MOSFET; the gate-source voltage is rated at ±20 V. |
| 2 | D | passive | DRAIN terminal, rated for a drain-source voltage VDS of -40 V; the datasheet's junction-to-case thermal resistance is specified to the drain (RthJC 1.1 °C/W). |
| 3 | S | passive | SOURCE terminal of the P-channel MOSFET, referenced by the ±20 V gate-source rating. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | UMW |
| Package | TO-252 |
| Category | Transistors/Thyristors |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | VDS | -40 |  |  | V | VGS=0V, ID=-250µA | 3 |
| Gate Threshold Voltage | VGS(th) | -1.5 |  | -2.5 | V | VDS=VGS, ID=-250µA | 3 |
| Gate-Body Leakage | IGSS | -100 |  | 100 | nA | VGS=±20V, VDS=0V | 3 |
| Zero gate voltage drain current | IDSS |  |  | -1 | µA | VDS=-40V, VGS=0V | 3 |
| Zero gate voltage drain current | IDSS |  |  | -50 | µA | VDS=-40V, VGS=0V, TJ=125°C | 3 |
| Zero gate voltage drain current | IDSS |  |  | -150 | µA | VDS=-40V, VGS=0V, TJ=175°C | 3 |
| On-State Drain Current | ID(ON) | -50 |  |  | A | VDS≤-5V, VGS=-10V | 3 |
| Forward Transconductance | gFS | 1.5 | 61 |  | S | VDS=-15V, ID=-17A | 3 |
| Drain-Source On-State Resistance | RDS(ON) |  |  | 17 | mΩ | VGS=-10V, ID=-17A | 3 |
| Drain-Source On-State Resistance | RDS(ON) |  |  | 29 | mΩ | VGS=-4.5V, ID=-14A | 3 |
| Input Capacitance | Ciss |  | 2872 | 3950 | pF | VGS=0V, VDS=-25V, f=1MHz | 3 |
| Output Capacitance | Coss |  | 508 | 635 | pF | VGS=0V, VDS=-25V, f=1MHz | 3 |
| Reverse Transfer Capacitance | Crss |  | 352 | 440 | pF | VGS=0V, VDS=-25V, f=1MHz | 3 |
| Total Gate Charge | Qg |  | 60 | 80 | nC | VDS=-30V, VGS=-10V, ID=-50A | 3 |
| Gate-Source Charge | Qgs |  | 5.7 | 8.6 | nC | VDS=-30V, VGS=-10V, ID=-50A | 3 |
| Gate-Drain Charge | Qgd |  | 14.7 | 22 | nC | VDS=-30V, VGS=-10V, ID=-50A | 3 |
| Gate Resistance | RG |  | 3 | 4.5 | Ω | f=1MHz | 3 |
| Turn-On Delay Time | tD(on) |  | 10 | 15 | ns | VDD=-20V, RL=0.4Ω; ID≌-50A, VGEN=-10V, RG=1Ω | 3 |
| Rise Time | tr |  | 12 | 18 | ns | VDD=-20V, RL=0.4Ω; ID≌-50A, VGEN=-10V, RG=1Ω | 3 |
| Turn-Off Delay Time | tD(off) |  | 40 | 60 | ns | VDD=-20V, RL=0.4Ω; ID≌-50A, VGEN=-10V, RG=1Ω | 3 |
| Fall Time | tf |  | 16 | 24 | ns | VDD=-20V, RL=0.4Ω; ID≌-50A, VGEN=-10V, RG=1Ω | 3 |
| Forward Voltage | VSD |  |  | -1.5 | V | IF=-50A, VGS=0V | 4 |
| Pulsed Current | ISM |  |  | -200 | A | Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 % | 4 |
| Drain-Source Voltage | VDS |  |  | -40 | V | TC=25°C | 1 |
| Gate-Source Voltage | VGS | -20 |  | 20 | V |  | 1 |
| Continuous Source Current (Diode Conduction) | IS |  |  | -50 | A | TC=25°C | 1 |
| Continuous Drain Current | ID |  |  | -50 | A | TC=25°C | 1 |
| Continuous Drain Current | ID |  |  | -39 | A | TC=125°C | 1 |
| Pulsed Drain Current | IDM |  |  | -200 | A | Pulse test; pulse width ≤ 300 μs, duty cycle ≤ 2 % | 1 |
| Single Pulse Avalanche Current | IAS |  |  | -40 | A | L=0.1mH | 1 |
| Single Pulse Avalanche Energy | EAS |  |  | 80 | mJ | L=0.1mH | 1 |
| Maximum Power Dissipation | PD |  |  | 136 | W | TC=25°C | 1 |
| Maximum Power Dissipation | PD |  |  | 3 | W | TA=25°C | 1 |
| Junction and Storage Temperature Range | TJ,TSTG | -55 |  | 175 | °C |  | 1 |
| Junction-to-Ambient Thermal Resistance | RthJA |  |  | 50 | °C/W | PCB Mount (1" square PCB, FR4) | 2 |
| Junction-to-Case Thermal Resistance (Drain) | RthJC |  |  | 1.1 | °C/W |  | 2 |

## CAD (KiCad official)

- Symbol: `SM4027PSU`
- Footprint: `Package_TO_SOT_SMD:TO-252-2`
- 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files: `sm4027psu-etched.step` / `sm4027psu-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sm4027psu.step` / `sm4027psu.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [UMW datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8755887231599435776) (11 pp, sha256 `d24e1d620d163210`, retrieved 2026-10-20, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/sm4027psu-datasheet.pdf)