SLM8254AAV

{
 "schema": "adom.pads/1",
 "slug": "slm8254aav",
 "footprint": "TSSOP-16_4.4x5mm_P0.65mm",
 "generated_from": {
  "footprint": "TSSOP-16_4.4x5mm_P0.65mm@sha256:fbac79fc5f310754",
  "pins": "page.json:component.pins",
  "overrides": null
 },
 "pin1": {
  "pad": "1",
  "at": [
   -2.8625,
   -2.275
  ],
  "corner": "top-left",
  "source": "silk-marker",
  "derived_from": "TSSOP-16_4.4x5mm_P0.65mm@sha256:fbac79fc5f310754"
 },
 "pad_count": 16,
 "symbol_pins": [
  "1",
  "10",
  "11",
  "12",
  "13",
  "14",
  "15",
  "16",
  "2",
  "3",
  "4",
  "5",
  "6",
  "7",
  "8",
  "9"
 ],
 "paste_apertures": 0,
 "issues": [],
 "pads": [
  {
   "pad": "1",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.8625,
    -2.275
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "1",
   "name": "COP",
   "type": "output",
   "description": "Charge-control FET gate drive terminal (Nch open-drain output). Drives the external charge-path N-MOSFET; goes high (through external pull-up) to disable charging on overcharge or 0V-charge inhibit.",
   "is_pin1": true,
   "source": {
    "geometry": "TSSOP-16_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "2",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.8625,
    -1.625
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "2",
   "name": "VMP",
   "type": "input",
   "description": "Voltage sense terminal between VC1 and VMP, used as the overcurrent-3 (charger over-current / charger-detect) detection input. Internally tied to VDD via ~1 MΩ (R_VMD) and to VSS via ~900 kΩ (R_VMS).",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-16_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "3",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.8625,
    -0.975
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "3",
   "name": "DOP",
   "type": "output",
   "description": "Discharge-control FET gate drive terminal (CMOS output, VSS↔VDD). Drives the external discharge-path N-MOSFET; goes low to disable discharge on overdischarge or overcurrent 1/2/3.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-16_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "4",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.8625,
    -0.325
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "4",
   "name": "VINI",
   "type": "input",
   "description": "Voltage sense terminal between VSS and VINI, used as the overcurrent-1 and overcurrent-2 detection input. Connect to the pack's V- (load) side through the sense resistance of the series FETs.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-16_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "5",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.8625,
    0.325
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "5",
   "name": "CDT",
   "type": "passive",
   "description": "Delay-capacitor terminal for overdischarge detection delay (t_DL) and overcurrent-1 detection delay (t_IOV1). Typical external capacitor 0.1 µF sets t_DL ≈ 100 ms, t_IOV1 ≈ 10 ms.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-16_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "6",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.8625,
    0.975
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "6",
   "name": "CCT",
   "type": "passive",
   "description": "Delay-capacitor terminal for overcharge detection delay (t_CU). Typical external capacitor 0.1 µF sets t_CU ≈ 1 s.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-16_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "7",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.8625,
    1.625
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "7",
   "name": "VSS",
   "type": "power_in",
   "description": "Negative supply input; connects to the negative terminal of the bottom cell (cell 4 in 4-series mode).",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-16_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "8",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.8625,
    2.275
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "8",
   "name": "NC",
   "type": "unconnected",
   "description": "No connection.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-16_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "9",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.8625,
    2.275
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "9",
   "name": "NC",
   "type": "unconnected",
   "description": "No connection.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-16_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "10",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.8625,
    1.625
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "10",
   "name": "SEL",
   "type": "input",
   "description": "3/4-series select input. Tie to VSS for 3-cell mode, tie to VDD for 4-cell mode. V_SELH ≥ VDD×0.8, V_SELL ≤ VDD×0.2.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-16_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "11",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.8625,
    0.975
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "11",
   "name": "CTL",
   "type": "input",
   "description": "Control input to enable/disable the charge and discharge FETs (COP and DOP). V_CTLH ≥ VDD×0.8, V_CTLL ≤ VDD×0.2.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-16_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "12",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.8625,
    0.325
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "12",
   "name": "VC4",
   "type": "input",
   "description": "Sense pin: negative terminal of cell 3 / positive terminal of cell 4. Used for per-cell overcharge and overdischarge detection.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-16_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "13",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.8625,
    -0.325
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "13",
   "name": "VC3",
   "type": "input",
   "description": "Sense pin: negative terminal of cell 2 / positive terminal of cell 3. Used for per-cell overcharge and overdischarge detection.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-16_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "14",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.8625,
    -0.975
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "14",
   "name": "VC2",
   "type": "input",
   "description": "Sense pin: negative terminal of cell 1 / positive terminal of cell 2. Used for per-cell overcharge and overdischarge detection.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-16_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "15",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.8625,
    -1.625
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "15",
   "name": "VC1",
   "type": "input",
   "description": "Positive terminal sense pin of cell 1 (the top-most cell). Used together with VDD for cell-1 voltage detection.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-16_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "16",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.8625,
    -2.275
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "16",
   "name": "VDD",
   "type": "power_in",
   "description": "Positive supply input; connects to the positive terminal of cell 1 (the pack's +) via a series resistor. Absolute max VSS+26 V; operating VDD-VSS = 3 V to 24 V.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-16_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  }
 ]
}