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Ray Publish 0.1.0 cacfc4b 1mo ago

SLM6500S

SOLA IC · Battery Management · SOP-8-EP

SLM6500S from SOLA IC, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Power ground for the charger; the datasheet gives no voltage limit for this pin.
2 VCC power_in Input supply pin, specified at 3.8 V to 6.0 V with 5 V typical and an 8.5 V absolute maximum; the charger enters low-power shutdown when VCC minus BAT is below 30 mV, with BAT current below 2 uA.
3 NCHRG output Open-drain charge-status output that is pulled low while charging (sink up to 5 mA gives V_NCHRG of 0.3 V typ, 0.6 V max) and is high-impedance otherwise; absolute maximum is 8 V.
4 NSTDBY output Open-drain charge-complete output that is pulled low when the battery is fully charged (sink 5 mA gives 0.3 V typ, 0.6 V max) and is high-impedance otherwise; absolute maximum is 8 V.
5 TS input Enable control and battery NTC input: charging is suspended when TS is below 45% or above 80% of VIN, TS tied to VCC disables temperature sensing, and TS tied to GND puts the part in standby with charging terminated; absolute maximum is 8 V.
6 BAT power_out Battery connection that delivers charge current and a 4.2 V regulated limit to the battery (4.2 V ±1%), with leakage below 2 uA when disabled or in sleep mode; absolute maximum is 7 V.
7 VS power_in Positive input of the charge-current sense; the external sense resistor RS between VS and BAT sets IBAT, with 100 mV across RS in constant-current mode; absolute maximum is 7 V.
8 LX output Switch node connected to the internal power MOSFETs and external inductor, serving as the charge-current output to the battery path; absolute maximum is 7 V.
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer SOLA IC
Package SOP-8-EP
Category Power Management (PMIC)
Pins 9

CAD (KiCad official)

  • Symbol: SLM6500S
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm
  • 3D model: SOP-8-EP (KiCad packages3D, STEP)
  • 3D model files: slm6500s-etched.step / slm6500s-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); slm6500s.step / slm6500s.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: SOLA IC datasheet (11 pp, sha256 a595eb963888f3e3, retrieved 2026-10-09, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF