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SLM21867CA-DG

Sillumin · Gate Drive ICs · SOIC-8

SLM21867CA-DG from Sillumin, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC power_in Low-side and logic fixed supply, recommended 7 V to 20 V (absolute maximum 25 V).
2 HIN input Logic input for high-side gate driver output (HO), in phase; VIH min 2.5 V, VIL max 0.8 V, CMOS Schmitt-triggered with pull-down.
3 LIN input Logic input for low-side gate driver output (LO), in phase; VIH min 2.5 V, VIL max 0.8 V, CMOS Schmitt-triggered with pull-down.
4 COM power_in Low-side return (ground reference for logic inputs and low-side output).
5 LO output Low-side gate drive output, swings from 0 V to VCC with 2.5 A source / 3 A sink typical pulsed current.
6 VS power_in High-side floating supply return, offset voltage up to 600 V (recommended max).
7 HO output High-side gate drive output, swings from VS to VB with 2.5 A source / 3 A sink typical pulsed current.
8 VB power_in High-side floating supply, recommended VS + 7 V to VS + 20 V (absolute maximum 625 V).

Key specifications

Parameter Value
Manufacturer Sillumin
Package SOIC-8
Category Power Management ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Turn-on propagation delay ton 170 250 ns VS = 0 V 5
Turn-off propagation delay toff 170 250 ns VS = 0 V 5
Turn-on rise time tr 8 16 ns 5
Turn-off fall time tf 5 10 ns 5
Delay matching, HS & LS turn-on/off MT 35 ns 5
Logic 1 input voltage VIH 2.5 V VCC = 7 V to 20V 5
Logic 0 input voltage VIL 0.8 V VCC = 7 V to 20V 5
High level output voltage, VBIAS - VO VOH 0.08 0.2 V IO = 20 mA 5
Low level output voltage, VO VOL 0.07 0.15 V IO = 20 mA 5
Offset supply leakage current ILK 50 µA VB = VS = 600 V 5
Quiescent VBS supply current IQBS 20 60 100 µA VIN = 0 V 5
Quiescent VCC supply current IQCC 200 290 400 µA VIN = 0 V 5
Logic 1 input bias current IIN+ 30 70 µA HIN=LIN = 5V 5
Logic 0 input bias current IIN- 5 µA HIN=LIN= 0V 5
VBS supply undervoltage positive going threshold VBSUV+ 5.65 6.25 6.85 V 5
VBS supply undervoltage negative going threshold VBSUV- 5.15 5.75 6.35 V 5
VCC supply undervoltage positive going threshold VCCUV+ 5.65 6.25 6.85 V 5
VCC supply undervoltage negative going threshold VCCUV- 5.15 5.75 6.35 V 5
Output high short circuit pulsed current IO+ 1.5 2.5 A VO = 0 V, VIN = Logic "1", PW ≤ 10 µs 5
Output low short circuit pulsed current IO- 2 3 A VO = 15 V, VIN = Logic "0", PW ≤ 10 µs 5
High-side floating absolute voltage (abs max) VB -0.3 625 V 4
Low-side output voltage (abs max) VLO -0.3 V max is VCC + 0.3 4
Low-side and logic fixed supply voltage (abs max) VCC -0.3 25 V 4
Logic input voltage HIN & LIN (abs max) VIN -0.3 V max is VCC + 0.3 4
Allowable offset supply voltage transient dVS/dt 50 V/ns 4
Package power dissipation PD 0.625 W TA ≤ +25°C 4
Thermal resistance, junction to ambient θJA 200 °C/W 4
Junction temperature TJ 150 °C 4
Storage temperature TS -55 150 °C 4
Lead temperature (soldering, 10 seconds) TL 300 °C 4
High-side floating supply offset voltage (recommended) VS 600 V min is Note 1 4
Low-side and logic fixed supply voltage (recommended) VCC 7 20 V 4
Low-side output voltage (recommended) VLO 0 V max is VCC 4
Ambient temperature TA -40 125 °C 4

CAD (KiCad official)

  • Symbol: SLM21867CA-DG
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: slm21867ca-dg-etched.step / slm21867ca-dg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); slm21867ca-dg.step / slm21867ca-dg.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Sillumin datasheet (8 pp, sha256 5d83f3e5f1954277, retrieved 2026-10-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF