component
SLM2005ECA-DG
Public Made by Adomby adom
Sillumin Isolators - Gate Drivers, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left)
f7d6d64
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{
"schema": "adom.pads/1",
"slug": "slm2005eca-dg",
"footprint": "SOIC-8_3.9x4.9mm_P1.27mm",
"generated_from": {
"footprint": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4",
"pins": "page.json:component.pins",
"overrides": null
},
"pin1": {
"pad": "1",
"at": [
-2.475,
-1.905
],
"corner": "top-left",
"source": "silk-marker",
"derived_from": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4"
},
"pad_count": 8,
"symbol_pins": [
"1",
"2",
"3",
"4",
"5",
"6",
"7",
"8"
],
"paste_apertures": 0,
"issues": [],
"pads": [
{
"pad": "1",
"kind": "smd",
"shape": "roundrect",
"at": [
-2.475,
-1.905
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "1",
"name": "VCC",
"type": "power_in",
"description": "Low-side and logic fixed supply. Recommended operating range 10 V to 18 V (absolute max 20 V), referenced to COM. Bypass locally to COM with a ceramic capacitor. UVLO thresholds are typ. 8.8 V rising / 8.3 V falling.",
"is_pin1": true,
"source": {
"geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "2",
"kind": "smd",
"shape": "roundrect",
"at": [
-2.475,
-0.635
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "2",
"name": "HIN",
"type": "input",
"description": "Logic input for the high-side gate driver output (HO); output is in phase with this input. CMOS/LSTTL compatible with VIH >= 2.5 V, VIL <= 0.8 V, absolute max 10 V, referenced to COM.",
"is_pin1": false,
"source": {
"geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "3",
"kind": "smd",
"shape": "roundrect",
"at": [
-2.475,
0.635
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "3",
"name": "LIN",
"type": "input",
"description": "Logic input for the low-side gate driver output (LO); output is in phase with this input. CMOS/LSTTL compatible with VIH >= 2.5 V, VIL <= 0.8 V, absolute max 10 V, referenced to COM.",
"is_pin1": false,
"source": {
"geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "4",
"kind": "smd",
"shape": "roundrect",
"at": [
-2.475,
1.905
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "4",
"name": "COM",
"type": "power_in",
"description": "Low-side return / device ground. All voltage parameters (VCC, VIN, VLO) are referenced to this pin.",
"is_pin1": false,
"source": {
"geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "5",
"kind": "smd",
"shape": "roundrect",
"at": [
2.475,
1.905
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "5",
"name": "LO",
"type": "output",
"description": "Low-side gate drive output. Drives the gate of the low-side N-channel MOSFET/IGBT between COM and VCC (typ. 10-18 V swing). Source ~1 A / sink ~1.5 A peak pulsed.",
"is_pin1": false,
"source": {
"geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "6",
"kind": "smd",
"shape": "roundrect",
"at": [
2.475,
0.635
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "6",
"name": "VS",
"type": "power_in",
"description": "High-side floating supply return. Connects to the source of the high-side N-channel MOSFET/IGBT and to the negative terminal of the bootstrap capacitor. May swing up to +200 V above COM; tolerates negative transient dV/dt up to 50 V/ns.",
"is_pin1": false,
"source": {
"geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "7",
"kind": "smd",
"shape": "roundrect",
"at": [
2.475,
-0.635
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "7",
"name": "HO",
"type": "output",
"description": "High-side gate drive output. Drives the gate of the high-side N-channel MOSFET/IGBT between VS and VB (typ. 10-18 V swing above VS). Source ~1 A / sink ~1.5 A peak pulsed.",
"is_pin1": false,
"source": {
"geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "8",
"kind": "smd",
"shape": "roundrect",
"at": [
2.475,
-1.905
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "8",
"name": "VB",
"type": "power_in",
"description": "High-side floating supply (bootstrap rail). Connect a bootstrap capacitor between VB and VS and a bootstrap diode from VCC to VB. Operating range VS+10 V to VS+18 V; absolute max 220 V to COM. VBS UVLO thresholds typ. 4.8 V rising / 4.3 V falling.",
"is_pin1": false,
"source": {
"geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
}
]
}