main
Download ZIP Propose a change
Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
Name Last commit message Last updated
docs sl78l12: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
viewers sl78l12: viewers · Ray 1mo ago
package.json Publish 0.2.0 · Ray 1mo ago
page.json sl78l12: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 1d ago
README.md sl78l12: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 19d ago
sl78l12-etched.fit.json sl78l12: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
sl78l12-etched.glb sl78l12: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
sl78l12-etched.step sl78l12: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
sl78l12.glb Publish 0.1.0 · Ray 1mo ago
sl78l12.kicad_mod Publish 0.1.0 · Ray 1mo ago
sl78l12.kicad_sym Publish 0.1.0 · Ray 1mo ago
sl78l12.lbr Publish 0.1.0 · Ray 1mo ago
sl78l12.step Publish 0.1.0 · Ray 1mo ago

SL78L12

Slkor SLKORMICRO Elec · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89-3

SL78L12 from Slkor SLKORMICRO Elec, in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT power_out Regulated 12V output. Typical output 12V (11.4V min / 12.6V max) at IO = 1-40 mA over VI = 14.5V to 27V. Requires a 0.1 µF output capacitor (C2) to ground for stability.
2 GND power_in Ground reference for the regulator. Common return for both input and output capacitors.
3 IN power_in Unregulated input supply, up to 35V max. Dropout voltage ~1.7V, so VI must be at least ~14V for a regulated 12V output. Requires a 0.33 µF input capacitor (C1) to ground.

Key specifications

Parameter Value
Manufacturer Slkor SLKORMICRO Elec
Package SOT-89-3
Category PMIC
Pins 3

CAD (KiCad official)

  • Symbol: SL78L12
  • Footprint: Package_TO_SOT_SMD:SOT-89-3
  • 3D model: SOT-89-3 (KiCad packages3D, STEP)
  • 3D model files: sl78l12-etched.step / sl78l12-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sl78l12.step / sl78l12.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
sl78l12.step 57 KB You want the bare part, or you mark your own boards.
sl78l12-etched.step 1.0 MB You want the part with SL78L12 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 277 faces against 42 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Slkor SLKORMICRO Elec datasheet (4 pp, sha256 5a1ef5a5ee1e1e5f, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF