# SL50N02D

**Slkor(SLKORMICRO Elec.)** · MOSFETs · TO-252

SL50N02D from Slkor(SLKORMICRO Elec.), in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate; gate-source voltage limited to ±12 V absolute maximum, with threshold of 0.4 V min to 1.2 V max at 250 µA. |
| 2 | D | passive | Drain (also the exposed tab); drain-source voltage rated 20 V and continuous drain current 50 A at Tc=25°C. |
| 3 | S | passive | Source; body diode continuous forward current 50 A at Tc=25°C with VSD max 1.2 V at 20 A. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Slkor(SLKORMICRO Elec.) |
| Package | TO-252 |
| Category | Transistors/Thyristors |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS |  |  | 20 | V |  | 1 |
| Gate-Source Voltage | VGS | -12 |  | 12 | V |  | 1 |
| Maximum Junction Temperature | TJ |  |  | 150 | °C |  | 1 |
| Storage Temperature Range | TSTG | -50 |  | 155 | °C |  | 1 |
| Diode Continuous Forward Current | IS |  |  | 50 | A | Tc=25°C | 1 |
| Pulse Drain Current Tested | IDM |  |  | 200 | A | Tc=25°C | 1 |
| Continuous Drain Current | ID |  |  | 50 | A | Tc=25°C | 1 |
| Single pulse avalanche energy | EAS |  |  | 11.25 | mJ |  | 1 |
| Drain-Source Breakdown Voltage | BV(BR)DSS | 20 |  |  | V | VGS=0V，ID=250μA | 2 |
| Zero Gate Voltage Drain Current | IDSS |  |  | 1 | uA | VDS=20V，VGS=0V | 2 |
| Gate-Body Leakage Current | IGSS | -100 |  | 100 | nA | VGS=±12V，VDS=0V | 2 |
| Gate Threshold Voltage | VGS(th) | 0.4 | 0.75 | 1.2 | V | VDS=VGS，ID=250μA | 2 |
| Drain-Source On-State Resistance | RDS(on) |  | 6.8 | 10 | mΩ | VGS=4.5V， ID=20A | 2 |
| Drain-Source On-State Resistance | RDS(on) |  | 8 | 13 | mΩ | VGS=2.5V，ID=18A | 2 |
| Forward on voltage | VSD |  |  | 1.2 | V | Tj=25℃，Is=20A | 2 |
| Input Capacitance | CISS |  | 1460 |  | pF |  | 2 |
| Output Capacitance | COSS |  | 240 |  | pF |  | 2 |
| Reverse Transfer Capacitance | CRSS |  | 215 |  | pF |  | 2 |
| Total Gate Charge | Qg |  | 20 |  | nC |  | 2 |
| Gate Source Charge | Qgs |  | 3 |  | nC |  | 2 |
| Gate Drain Charge | Qgd |  | 6.5 |  | nC |  | 2 |
| Turn-on Delay Time | td(on) |  | 10 |  | nS | VDD=10V，ID=10A，VGS=4.5V，RG=3Ω | 2 |
| Turn-on Rise Time | tr |  | 20 |  | nS | VDD=10V，ID=10A，VGS=4.5V，RG=3Ω | 2 |
| Turn-Off Delay Time | td(off) |  | 40 |  | nS | VDD=10V，ID=10A，VGS=4.5V，RG=3Ω | 2 |
| Turn-Off Fall Time | tf |  | 20 |  | nS | VDD=10V，ID=10A，VGS=4.5V，RG=3Ω | 2 |

## CAD (KiCad official)

- Symbol: `SL50N02D`
- Footprint: `Package_TO_SOT_SMD:TO-252-2`
- 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files: `sl50n02d-etched.step` / `sl50n02d-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sl50n02d.step` / `sl50n02d.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Slkor(SLKORMICRO Elec.) datasheet](docs/sl50n02d-datasheet.pdf) (4 pp, sha256 `e14780accca1fbc9`, retrieved 2026-11-06, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/sl50n02d-datasheet.pdf)