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Contents

Pinout
Key specifications
Ordering variants
CAD (KiCad official)
3D model downloads
Provenance

README

markdown

SL4949

Slkor SLKORMICRO Elec · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOP-8

SL4949 from Slkor SLKORMICRO Elec, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	Vin	power_in	Supply input (VCC). Operating range 5.5 V to 42 V; can withstand transient inputs up to 42 V, suitable for automotive load-dump environments.
2	Sense	input	Voltage-monitor comparator input (SI). Compared against internal 1.23 V reference (threshold 1.16 to 1.35 V, typ 1.23 V) to drive the So output before the Reset signal asserts.
3	Vz	power_out	Internal preregulator output (typ 5.0 V, Iz up to 5 mA). A ceramic bypass capacitor (C3 <= 1.0 uF) on this pin improves transient noise immunity when VCC < 8.0 V.
4	CT	passive	Reset delay-timing capacitor. Charged by an internal 2.0 uA current source to a 2.0 V threshold; with CT=100 nF the reset delay is typ 100 ms (55-180 ms).
5	GND	power_in	Device ground reference. Exposed pad on SL4949S (ESOP-8) is internally tied to GND and should be soldered to the ground plane for thermal dissipation.
6	Reset	output	Open-collector reset output for the host microcontroller. Asserts low (VOL < 0.4 V with 10 kOhm pull-up) when Vout drops below Vout-0.7 V; sink up to 5 mA, leakage < 1 uA at 5.0 V.
7	So	output	Open-collector Sense output (early-warning flag). Pulls low (VOL < 0.4 V) when Sense (Si) falls below the 1.23 V threshold, allowing the host MCU to run housekeeping before Reset trips.
8	Vout	power_out	Regulated 5 V output (4.95-5.05 V typ). Typical load 100 mA with dropout < 0.4 V; internal current limit 105-330 mA, folds back to ~100 mA on short circuit.

Key specifications

Parameter	Value
Manufacturer	Slkor SLKORMICRO Elec
Package	SOP-8
Category	PMIC
Pins	8

Ordering variants

Same part, different packaging or reel option.

SL4949
SL4949S

CAD (KiCad official)

Symbol: SL4949
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOP-8 (KiCad packages3D, STEP)
3D model files: sl4949-etched.step / sl4949-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sl4949.step / sl4949.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`sl4949.step`	122 KB	You want the bare part, or you mark your own boards.
`sl4949-etched.step`	1.5 MB	You want the part with `SL4949` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 377 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Slkor SLKORMICRO Elec datasheet (14 pp, sha256 3baeda6ec5fab504, retrieved 2026-08-17, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF