component
SL4184
Public Made by Adomby adom
Slkor SLKORMICRO Elec MOSFETs, TO-252. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSL4184
Slkor SLKORMICRO Elec · MOSFETs · TO-252
SL4184 from Slkor SLKORMICRO Elec, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate terminal of the N-channel MOSFET; gate-source voltage is rated ±20 V (VGSS), with threshold of 1.2 V min to 2 V max at 250 µA. |
| 2 | D | passive | Drain terminal (exposed tab, middle lead removed in the TO-252-2 package); drain-source voltage is rated 40 V with 60 A continuous drain current at TC=25°C. |
| 3 | S | passive | Source terminal of the N-channel MOSFET, with body diode continuous forward current rated 40 A. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Slkor SLKORMICRO Elec |
| Package | TO-252 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDSS | 40 | V | 2 | |||
| Drain-Source Avalanche Voltage (Maximum) | BVDS(Avalanche) | 45 | V | Avalanche single pulse test, tav≤100μs, duty<1% | 2 | ||
| Gate-Source Voltage | VGSS | -20 | 20 | V | 2 | ||
| Maximum Junction Temperature | TJ | 175 | °C | 2 | |||
| Storage Temperature Range | TSTG | -55 | 175 | °C | 2 | ||
| Diode Continuous Forward Current | IS | 40 | A | 2 | |||
| 300μs Pulse Drain Current Tested | IDP | 160 | A | TC=25°C | 2 | ||
| 300μs Pulse Drain Current Tested | IDP | 90 | A | TC=100°C | 2 | ||
| Continuous Drain Current | ID | 60 | A | TC=25°C; current limited by bond wire | 2 | ||
| Continuous Drain Current | ID | 48 | A | TC=100°C | 2 | ||
| Maximum Power Dissipation | PD | 60 | W | TC=25°C | 2 | ||
| Maximum Power Dissipation | PD | 30 | W | TC=100°C | 2 | ||
| Drain-Source Avalanche Energy | EAS | 100 | mJ | L=0.5mH | 2 | ||
| Thermal Resistance-Junction to Case | RθJC | 2.5 | °C/W | 2 | |||
| Thermal Resistance-Junction to Ambient | RθJA | 50 | °C/W | 2 | |||
| Drain-Source Breakdown Voltage | BVDSS | 40 | V | VGS=0V, IDS=250μA | 3 | ||
| Zero Gate Voltage Drain Current | IDSS | 1 | μA | VDS=32V, VGS=0V | 3 | ||
| Zero Gate Voltage Drain Current | IDSS | 30 | μA | TJ=85°C | 3 | ||
| Gate Threshold Voltage | VGS(th) | 1.2 | 1.6 | 2 | V | VDS=VGS, IDS=250μA | 3 |
| Gate Leakage Current | IGSS | 100 | nA | VGS=±20V, VDS=0V | 3 | ||
| Drain-Source On-state Resistance | RDS(ON) | 7.2 | 9 | mΩ | VGS=10V, IDS=20A | 3 | |
| Drain-Source On-state Resistance | RDS(ON) | 9.2 | 13 | mΩ | VGS=4.5V, IDS=10A | 3 | |
| Diode Forward Voltage | VSD | 0.8 | 1.1 | V | ISD=20A, VGS=0V | 3 | |
| Turn-on Delay Time | td(ON) | 11 | 21 | ns | VDD=20V, RL=20Ω, IDS=1A, VGEN=10V, RG=6Ω | 3 | |
| Turn-on Rise Time | tr | 13 | 24 | ns | VDD=20V, RL=20Ω, IDS=1A, VGEN=10V, RG=6Ω | 3 | |
| Turn-off Delay Time | td(OFF) | 37 | 67 | ns | VDD=20V, RL=20Ω, IDS=1A, VGEN=10V, RG=6Ω | 3 | |
| Turn-off Fall Time | tf | 11 | 21 | ns | VDD=20V, RL=20Ω, IDS=1A, VGEN=10V, RG=6Ω | 3 | |
| Total Gate Charge | Qg | 31.2 | 44 | nC | VDS=20V, VGS=10V, IDS=40A | 3 |
CAD (KiCad official)
- Symbol:
SL4184 - Footprint:
Package_TO_SOT_SMD:TO-252-2 - 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files:
sl4184-etched.step/sl4184-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sl4184.step/sl4184.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Slkor SLKORMICRO Elec datasheet (8 pp, sha256
b343c0943fa49e04, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).