component
SL2003
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Slkor SLKORMICRO Elec Gate Drivers, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SL2003
Slkor SLKORMICRO Elec · Gate Drivers · SOP-8
SL2003 from Slkor SLKORMICRO Elec, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Low-side and logic fixed supply, recommended 10 V to 20 V, with an absolute maximum of 25 V referenced to COM. |
| 2 | HIN | input | Logic input for the high-side gate driver output HO, in phase with HO; logic input range is 0 to VCC, with VIH minimum 2.5 V and VIL maximum 0.8 V. |
| 3 | LIN | input | Logic input for the low-side gate driver output LO, out of phase with LO; logic input range is 0 to VCC, with VIH minimum 2.5 V and VIL maximum 0.8 V. |
| 4 | COM | power_in | Low-side return and reference for all voltage ratings and logic input levels. |
| 5 | LO | output | Low-side gate drive output, swinging between 0 V and VCC. |
| 6 | VS | power_in | High-side floating supply return; offset voltage up to 200 V, must stay between VB - 25 V and VB + 0.3 V, with dVS/dt limited to 50 V/ns. |
| 7 | HO | output | High-side gate drive output, swinging between VS and VB, in phase with HIN. |
| 8 | VB | power_in | High-side floating supply, recommended VS + 10 V to VS + 20 V, with an absolute maximum of 225 V referenced to COM. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Slkor SLKORMICRO Elec |
| Package | SOP-8 |
| Category | Motor Driver ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| High-side floating absolute voltage | VB | -0.3 | 225 | V | 4 | ||
| Low-side and logic fixed supply voltage | VCC | -0.3 | 25 | V | 4 | ||
| Low-side output voltage | VLO | -0.3 | V | 4 | |||
| Logic input voltage (HIN & LIN) | VIN | -0.3 | V | 4 | |||
| Allowable offset supply voltage transient | dVS/dt | 50 | V/ns | 4 | |||
| Package power dissipation | PD | 0.625 | W | TA ≤ +25°C | 4 | ||
| Thermal resistance, junction to ambient | θJA | 200 | °C/W | 4 | |||
| Junction temperature | TJ | 150 | °C | 4 | |||
| Storage temperature | TS | -55 | 150 | °C | 4 | ||
| Lead temperature (soldering, 10 seconds) | TL | 300 | °C | 4 | |||
| High-side floating supply offset voltage | VS | 200 | V | 4 | |||
| Low-side and logic fixed supply voltage | VCC | 10 | 20 | V | 4 | ||
| Low-side output voltage | VLO | 0 | V | 4 | |||
| Logic input voltage (HIN & LIN) | VIN | 0 | V | 4 | |||
| Ambient temperature | TA | -40 | 125 | °C | 4 | ||
| Turn-on propagation delay | ton | 680 | 820 | ns | VS = 0 V | 5 | |
| Turn-off propagation delay | toff | 150 | 220 | ns | VS = 0 V | 5 | |
| Turn-on rise time | tr | 70 | 170 | ns | 5 | ||
| Turn-off fall time | tf | 35 | 90 | ns | 5 | ||
| Deadtime, LS turn-off to HS turn-on & HS turn-on to LS turn-off | DT | 400 | 520 | 750 | ns | 5 | |
| Delay matching, HS & LS turn-on/off | MT | 60 | ns | 5 | |||
| Logic "1" (HIN) & Logic "0" (LIN) input voltage | VIH | 2.5 | V | VCC = 10 V to 20V | 5 | ||
| Logic "0" (HIN) & Logic "1" (LIN) input voltage | VIL | 0.8 | V | 5 | |||
| High level output voltage, VBIAS - VO | VOH | 0.05 | 0.2 | V | IO = 2 mA | 5 | |
| Low level output voltage, VO | VOL | 0.02 | 0.1 | V | 5 | ||
| Offset supply leakage current | ILK | 50 | µA | VB = VS = 200 V | 5 | ||
| Quiescent VBS supply current | IQBS | 60 | 75 | µA | VIN = 0 V | 5 | |
| Quiescent VCC supply current | IQCC | 220 | 280 | µA | 5 | ||
| Logic "1" input bias current | IIN+ | 8 | 15 | µA | HIN = 5 V, LIN = 0 V | 5 | |
| Logic "0" input bias current | IIN- | 5 | µA | HIN = 0 V, LIN = 5 V | 5 | ||
| VCC and VBS supply undervoltage positive going threshold | VCCUV+ / VBSUV+ | 8 | 8.9 | 9.8 | V | 5 | |
| VCC and VBS supply undervoltage negative going threshold | VCCUV- / VBSUV- | 7.4 | 8.2 | 9 | V | 5 | |
| Output high short circuit pulsed current | IO+ | 130 | 290 | mA | VO = 0 V, VIN = VIH, PW ≤ 10 µs | 5 | |
| Output low short circuit pulsed current | IO- | 270 | 600 | mA | VO = 15 V, VIN = VIL, PW ≤ 10 µs | 5 |
CAD (KiCad official)
- Symbol:
SL2003 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
sl2003-etched.step/sl2003-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sl2003.step/sl2003.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Slkor SLKORMICRO Elec datasheet (7 pp, sha256
e9762d143e009ee1, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SL2003
**Slkor SLKORMICRO Elec** · Gate Drivers · SOP-8
SL2003 from Slkor SLKORMICRO Elec, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Low-side and logic fixed supply, recommended 10 V to 20 V, with an absolute maximum of 25 V referenced to COM. |
| 2 | HIN | input | Logic input for the high-side gate driver output HO, in phase with HO; logic input range is 0 to VCC, with VIH minimum 2.5 V and VIL maximum 0.8 V. |
| 3 | LIN | input | Logic input for the low-side gate driver output LO, out of phase with LO; logic input range is 0 to VCC, with VIH minimum 2.5 V and VIL maximum 0.8 V. |
| 4 | COM | power_in | Low-side return and reference for all voltage ratings and logic input levels. |
| 5 | LO | output | Low-side gate drive output, swinging between 0 V and VCC. |
| 6 | VS | power_in | High-side floating supply return; offset voltage up to 200 V, must stay between VB - 25 V and VB + 0.3 V, with dVS/dt limited to 50 V/ns. |
| 7 | HO | output | High-side gate drive output, swinging between VS and VB, in phase with HIN. |
| 8 | VB | power_in | High-side floating supply, recommended VS + 10 V to VS + 20 V, with an absolute maximum of 225 V referenced to COM. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Slkor SLKORMICRO Elec |
| Package | SOP-8 |
| Category | Motor Driver ICs |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| High-side floating absolute voltage | VB | -0.3 | | 225 | V | | 4 |
| Low-side and logic fixed supply voltage | VCC | -0.3 | | 25 | V | | 4 |
| Low-side output voltage | VLO | -0.3 | | | V | | 4 |
| Logic input voltage (HIN & LIN) | VIN | -0.3 | | | V | | 4 |
| Allowable offset supply voltage transient | dVS/dt | | | 50 | V/ns | | 4 |
| Package power dissipation | PD | | | 0.625 | W | TA ≤ +25°C | 4 |
| Thermal resistance, junction to ambient | θJA | | | 200 | °C/W | | 4 |
| Junction temperature | TJ | | | 150 | °C | | 4 |
| Storage temperature | TS | -55 | | 150 | °C | | 4 |
| Lead temperature (soldering, 10 seconds) | TL | | | 300 | °C | | 4 |
| High-side floating supply offset voltage | VS | | | 200 | V | | 4 |
| Low-side and logic fixed supply voltage | VCC | 10 | | 20 | V | | 4 |
| Low-side output voltage | VLO | 0 | | | V | | 4 |
| Logic input voltage (HIN & LIN) | VIN | 0 | | | V | | 4 |
| Ambient temperature | TA | -40 | | 125 | °C | | 4 |
| Turn-on propagation delay | ton | | 680 | 820 | ns | VS = 0 V | 5 |
| Turn-off propagation delay | toff | | 150 | 220 | ns | VS = 0 V | 5 |
| Turn-on rise time | tr | | 70 | 170 | ns | | 5 |
| Turn-off fall time | tf | | 35 | 90 | ns | | 5 |
| Deadtime, LS turn-off to HS turn-on & HS turn-on to LS turn-off | DT | 400 | 520 | 750 | ns | | 5 |
| Delay matching, HS & LS turn-on/off | MT | | | 60 | ns | | 5 |
| Logic "1" (HIN) & Logic "0" (LIN) input voltage | VIH | 2.5 | | | V | VCC = 10 V to 20V | 5 |
| Logic "0" (HIN) & Logic "1" (LIN) input voltage | VIL | | | 0.8 | V | | 5 |
| High level output voltage, VBIAS - VO | VOH | | 0.05 | 0.2 | V | IO = 2 mA | 5 |
| Low level output voltage, VO | VOL | | 0.02 | 0.1 | V | | 5 |
| Offset supply leakage current | ILK | | | 50 | µA | VB = VS = 200 V | 5 |
| Quiescent VBS supply current | IQBS | | 60 | 75 | µA | VIN = 0 V | 5 |
| Quiescent VCC supply current | IQCC | | 220 | 280 | µA | | 5 |
| Logic "1" input bias current | IIN+ | | 8 | 15 | µA | HIN = 5 V, LIN = 0 V | 5 |
| Logic "0" input bias current | IIN- | | | 5 | µA | HIN = 0 V, LIN = 5 V | 5 |
| VCC and VBS supply undervoltage positive going threshold | VCCUV+ / VBSUV+ | 8 | 8.9 | 9.8 | V | | 5 |
| VCC and VBS supply undervoltage negative going threshold | VCCUV- / VBSUV- | 7.4 | 8.2 | 9 | V | | 5 |
| Output high short circuit pulsed current | IO+ | 130 | 290 | | mA | VO = 0 V, VIN = VIH, PW ≤ 10 µs | 5 |
| Output low short circuit pulsed current | IO- | 270 | 600 | | mA | VO = 15 V, VIN = VIL, PW ≤ 10 µs | 5 |
## CAD (KiCad official)
- Symbol: `SL2003`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `sl2003-etched.step` / `sl2003-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sl2003.step` / `sl2003.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Slkor SLKORMICRO Elec datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590920195098177537) (7 pp, sha256 `e9762d143e009ee1`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sl2003-datasheet.pdf)