component
SL2.1A
Public Made by Adomby adom
CoreChips SL2 1A USB Converters, SOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
sl2-1a: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
62654c2
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{
"schema_version": 1,
"type": "component",
"slug": "sl2-1a",
"title": "SL2.1A",
"brief": "CoreChips SL2 1A USB Converters, SOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
"version": "0.2.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"interface",
"sl2.1a"
],
"component": {
"mpn": "SL2.1A",
"manufacturer": "CoreChips SL2 1A",
"package": "SOP-16",
"pin_count": 16,
"category": "Interface",
"subcategory": "USB Converters",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/df332af74440545569134d5952707942.pdf",
"parts": {
"symbol": "sl2-1a.kicad_sym",
"footprint": "sl2-1a.kicad_mod",
"model_3d": "sl2-1a-etched.glb",
"model_3d_plain": "sl2-1a.glb",
"model_3d_step": "sl2-1a-etched.step",
"model_3d_step_plain": "sl2-1a.step",
"lbr": "sl2-1a.lbr"
},
"distributor_links": {
"lcsc": "C192893"
},
"pins": [
{
"number": "1",
"name": "DM4",
"type": "bidirectional",
"description": "Downstream Port 4 USB D- signal. Connects to the D- line of downstream USB device 4 with internal 15 kΩ pull-down (Rpd) and integrated 45 Ω high-speed termination."
},
{
"number": "2",
"name": "DP4",
"type": "bidirectional",
"description": "Downstream Port 4 USB D+ signal. Connects to the D+ line of downstream USB device 4 with internal 15 kΩ pull-down (Rpd) and integrated 45 Ω high-speed termination."
},
{
"number": "3",
"name": "DM3",
"type": "bidirectional",
"description": "Downstream Port 3 USB D- signal. Connects to the D- line of downstream USB device 3 with internal 15 kΩ pull-down and 45 Ω high-speed termination."
},
{
"number": "4",
"name": "DP3",
"type": "bidirectional",
"description": "Downstream Port 3 USB D+ signal. Connects to the D+ line of downstream USB device 3 with internal 15 kΩ pull-down and 45 Ω high-speed termination."
},
{
"number": "5",
"name": "DM2",
"type": "bidirectional",
"description": "Downstream Port 2 USB D- signal. Connects to the D- line of downstream USB device 2 with internal 15 kΩ pull-down and 45 Ω high-speed termination."
},
{
"number": "6",
"name": "DP2",
"type": "bidirectional",
"description": "Downstream Port 2 USB D+ signal. Connects to the D+ line of downstream USB device 2 with internal 15 kΩ pull-down and 45 Ω high-speed termination."
},
{
"number": "7",
"name": "DM1",
"type": "bidirectional",
"description": "Downstream Port 1 USB D- signal. Connects to the D- line of downstream USB device 1 with internal 15 kΩ pull-down and 45 Ω high-speed termination."
},
{
"number": "8",
"name": "DP1",
"type": "bidirectional",
"description": "Downstream Port 1 USB D+ signal. Connects to the D+ line of downstream USB device 1 with internal 15 kΩ pull-down and 45 Ω high-speed termination."
},
{
"number": "9",
"name": "UDM",
"type": "bidirectional",
"description": "Upstream port USB D- signal. Connects to the host's D- line with internal 1.5 kΩ pull-up (Rpu) for high-speed device announcement and 45 Ω HS termination."
},
{
"number": "10",
"name": "UDP",
"type": "bidirectional",
"description": "Upstream port USB D+ signal. Connects to the host's D+ line with internal 1.5 kΩ pull-up (Rpu) and 45 Ω HS termination."
},
{
"number": "11",
"name": "VCC5",
"type": "power_in",
"description": "5 V main supply input. Feeds the internal 5V-to-3.3V LDO; single-supply operation for the whole chip."
},
{
"number": "12",
"name": "VSS",
"type": "power_in",
"description": "Chip ground (0 V) reference for all analog and digital supplies."
},
{
"number": "13",
"name": "VDD33",
"type": "power_out",
"description": "3.3 V LDO output derived from VCC5. Must be bypassed with a 4.7 µF capacitor to ground placed close to the pin; feeds the internal 3.3V-to-1.8V LDO through the PCB."
},
{
"number": "14",
"name": "VDD18",
"type": "power_out",
"description": "Digital 1.8 V LDO output. Must be bypassed with a 4.7 µF capacitor to ground placed close to the pin."
},
{
"number": "15",
"name": "XOUT",
"type": "output",
"description": "12 MHz crystal oscillator output pin. Connects to one terminal of a 12 MHz / CL=20 pF / 20 ppm crystal; no external load capacitors are required per datasheet."
},
{
"number": "16",
"name": "XIN",
"type": "input",
"description": "12 MHz crystal oscillator input pin. Connects to the other terminal of the 12 MHz / 20 pF / 20 ppm crystal; feeds the internal 12→480 MHz PLL."
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/df332af74440545569134d5952707942.pdf",
"pages": 21,
"sha256": "9a55c6649643b949",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 16,
"described": 16,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"pin1": {
"pad": "1",
"at": [
-2.475,
-4.445
],
"corner": "top-left",
"source": "silk-marker",
"derived_from": "SOIC-16_3.9x9.9mm_P1.27mm@sha256:f9b5075740f7816c",
"mark": "drawn"
},
"models_3d": [
{
"file": "sl2-1a.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6,
9.9,
1.75
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "sl2-1a-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6,
9.9,
1.75
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "46fdcb0c03d5f361164f0973649dc2c2cb0a097bf8b6acbcffc3e61ef69ea6af",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "CoreChips",
"Package": "SOP-16",
"Category": "Interface",
"Pins": "16"
}
},
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"sl2.1a"
],
"discovery_pitch": "SL2.1A (CoreChips SL2 1A) component page with datasheet-verified CAD.",
"author": {
"name": "Ray"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"sl2-1a.kicad_sym",
"sl2-1a.kicad_mod",
"sl2-1a.glb",
"sl2-1a.step",
"sl2-1a-etched.step",
"sl2-1a.lbr",
"docs/hero.png",
"docs/sl2-1a-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html"
],
"visibility": {
"public": true
},
"variants": [
{
"mpn": "SL2.1A",
"kind": "packaging"
},
{
"mpn": "SL2.1S",
"kind": "unknown"
},
{
"mpn": "SL2.2S",
"kind": "unknown"
},
{
"mpn": "SL2.2Q",
"kind": "unknown"
}
],
"updated_at": "2026-09-25T06:08:45.784Z"
}